[PATCH 1/1] arm64: dts: rockchip: rk3308: Add Radxa ROCK Pi S support
Kever Yang
kever.yang at rock-chips.com
Tue Feb 14 04:28:26 CET 2023
Hi Akash,
You will need to add MAINTAINER for this board.
other parts looks good to me.
Thanks,
- Kever
On 2023/2/14 00:11, Akash Gajjar wrote:
> Add Radxa ROCK 3 Model A support. sync rk3308-rock-pi-s.dts from
> Linux 6.2.0-rc7.
>
> ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
> - 256MB/512MB DDR3 RAM
> - SD, NAND flash (optional on board 1/2/4/8Gb)
> - 100MB ethernet, PoE (optional)
> - Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
> - USB2.0 Type-A HOST x1
> - USB3.0 Type-C OTG x1
> - 26-pin expansion header
> - USB Type-C DC 5V Power Supply
>
> Linux commit commit for the same,
> <2e04c25b1320> ("arm64: dts: rockchip: add ROCK Pi S DTS support")
>
> Signed-off-by: Akash Gajjar <gajjar04akash at gmail.com>
> ---
> arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 17 ++
> arch/arm/dts/rk3308-rock-pi-s.dts | 228 ++++++++++++++++++++++
> configs/rock-pi-s-rk3308_defconfig | 89 +++++++++
> 3 files changed, 334 insertions(+)
> create mode 100644 arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts
> create mode 100644 configs/rock-pi-s-rk3308_defconfig
>
> diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
> new file mode 100644
> index 0000000000..27735c49dd
> --- /dev/null
> +++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
> + */
> +#include "rk3308-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + u-boot,spl-boot-order = "same-as-spl", &emmc;
> + };
> +};
> +
> +&uart0 {
> + u-boot,dm-pre-reloc;
> + clock-frequency = <24000000>;
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts
> new file mode 100644
> index 0000000000..b5a8691b3f
> --- /dev/null
> +++ b/arch/arm/dts/rk3308-rock-pi-s.dts
> @@ -0,0 +1,228 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
> + * Copyright (C) 2023 Akash Gajjar <gajjar04akash at gmail.com>
> + * Copyright (c) 2023 Jagan Teki <jagan at openedev.com>
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/input/input.h>
> +#include "rk3308.dtsi"
> +
> +/ {
> + model = "Radxa ROCK Pi S";
> + compatible = "radxa,rockpis", "rockchip,rk3308";
> +
> + aliases {
> + ethernet0 = &mac;
> + mmc0 = &emmc;
> + mmc1 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = "serial0:1500000n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
> +
> + green-led {
> + default-state = "on";
> + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
> + label = "rockpis:green:power";
> + linux,default-trigger = "default-on";
> + };
> +
> + blue-led {
> + default-state = "on";
> + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
> + label = "rockpis:blue:user";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-0 = <&wifi_enable_h>;
> + pinctrl-names = "default";
> + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
> + };
> +
> + vcc_1v8: vcc-1v8 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_1v8";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&vcc_io>;
> + };
> +
> + vcc_io: vcc-io {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_io";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc_ddr: vcc-ddr {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <1500000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc5v0_otg: vcc5v0-otg {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&otg_vbus_drv>;
> + regulator-name = "vcc5v0_otg";
> + regulator-always-on;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc5v0_sys: vcc5v0-sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + vdd_core: vdd-core {
> + compatible = "pwm-regulator";
> + pwms = <&pwm0 0 5000 1>;
> + pwm-supply = <&vcc5v0_sys>;
> + regulator-name = "vdd_core";
> + regulator-min-microvolt = <827000>;
> + regulator-max-microvolt = <1340000>;
> + regulator-init-microvolt = <1015000>;
> + regulator-settling-time-up-us = <250>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_log: vdd-log {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1050000>;
> + regulator-max-microvolt = <1050000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <&vdd_core>;
> +};
> +
> +&emmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + mmc-hs200-1_8v;
> + non-removable;
> + vmmc-supply = <&vcc_io>;
> + status = "okay";
> +};
> +
> +&mac {
> + clock_in_out = "output";
> + phy-supply = <&vcc_io>;
> + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 50000 50000>;
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&pinctrl {
> + pinctrl-names = "default";
> + pinctrl-0 = <&rtc_32k>;
> +
> + leds {
> + green_led_gio: green-led-gpio {
> + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + heartbeat_led_gpio: heartbeat-led-gpio {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + usb {
> + otg_vbus_drv: otg-vbus-drv {
> + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + sdio-pwrseq {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + wifi_host_wake: wifi-host-wake {
> + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +};
> +
> +&pwm0 {
> + status = "okay";
> + pinctrl-0 = <&pwm0_pin_pull_down>;
> +};
> +
> +&saradc {
> + vref-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&sdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + keep-power-in-suspend;
> + max-frequency = <1000000>;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + sd-uhs-sdr104;
> + status = "okay";
> +};
> +
> +&sdmmc {
> + cap-sd-highspeed;
> + status = "okay";
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&uart4 {
> + status = "okay";
> +
> + bluetooth {
> + compatible = "realtek,rtl8723bs-bt";
> + device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
> + host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> +&wdt {
> + status = "okay";
> +};
> diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig
> new file mode 100644
> index 0000000000..6c863381a7
> --- /dev/null
> +++ b/configs/rock-pi-s-rk3308_defconfig
> @@ -0,0 +1,89 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00600000
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s"
> +CONFIG_ROCKCHIP_RK3308=y
> +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
> +CONFIG_SPL_DRIVERS_MISC=y
> +CONFIG_TARGET_EVB_RK3308=y
> +CONFIG_SPL_STACK_R_ADDR=0xc00000
> +CONFIG_DEBUG_UART_BASE=0xFF0A0000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_DEBUG_UART=y
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
> +CONFIG_ANDROID_BOOT_IMAGE=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_BOOTDELAY=0
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_SPL_MAX_SIZE=0x20000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x400000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_SPL_STACK_R=y
> +# CONFIG_CMD_BDI is not set
> +# CONFIG_CMD_CONSOLE is not set
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_IMI is not set
> +# CONFIG_CMD_XIMG is not set
> +CONFIG_CMD_GPT=y
> +# CONFIG_CMD_LOADB is not set
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +# CONFIG_CMD_ITEST is not set
> +# CONFIG_CMD_SETEXPR is not set
> +# CONFIG_CMD_SLEEP is not set
> +# CONFIG_DOS_PARTITION is not set
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_REGMAP=y
> +CONFIG_SYSCON=y
> +CONFIG_CLK=y
> +# CONFIG_USB_FUNCTION_FASTBOOT is not set
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY=y
> +CONFIG_PINCTRL=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_RAM=y
> +CONFIG_DM_RESET=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_DEBUG_UART_SKIP_INIT=y
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_DWC2=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DWC2_OTG=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_SPL_TINY_MEMSET=y
> +CONFIG_LZO=y
> +CONFIG_ERRNO_STR=y
> +# CONFIG_EFI_LOADER is not set
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