[PATCH v1 2/2] net: designware: Add bitbang feature for designware driver

[Jim Liu]

Add bb_miiphy_bus function for designware bitbang feature.

Signed-off-by: Jim Liu <JJLIU0 at nuvoton.com>
---
 drivers/net/designware.c | 109 ++++++++++++++++++++++++++++++++++++++-
 drivers/net/designware.h |   3 ++
 2 files changed, 111 insertions(+), 1 deletion(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index e09ca3313d..c539afc620 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -757,6 +757,32 @@ int designware_eth_probe(struct udevice *dev)
 	}
 	priv->bus = miiphy_get_dev_by_name(dev->name);
 
+#if defined(CONFIG_BITBANGMII) && defined(CONFIG_DM_GPIO)
+	if (dev_read_bool(dev, "snps,bitbang-mii")) {
+		printf("\n%s: use bitbang mii..\n", dev->name);
+		ret = gpio_request_by_name(dev, "snps,mdc-gpio", 0,
+					   &priv->mdc_gpio, GPIOD_IS_OUT);
+		if (ret) {
+			printf("no mdc-gpio\n");
+			return ret;
+		}
+
+		ret = gpio_request_by_name(dev, "snps,mdio-gpio", 0,
+					   &priv->mdio_gpio, GPIOD_IS_OUT);
+
+		if (ret) {
+			printf("no mdio-gpio\n");
+			return ret;
+		}
+		dm_gpio_set_value(&priv->mdc_gpio, 1);
+		bb_miiphy_buses[0].priv = priv;
+		sprintf(bb_miiphy_buses[0].name, dev->name);
+		priv->bus->read = bb_miiphy_read;
+		priv->bus->write = bb_miiphy_write;
+		priv->bus->reset = NULL;
+	}
+#endif
+
 	ret = dw_phy_init(priv, dev);
 	debug("%s, ret=%d\n", __func__, ret);
 	if (!ret)
@@ -826,7 +852,7 @@ int designware_eth_of_to_plat(struct udevice *dev)
 		reset_flags |= GPIOD_ACTIVE_LOW;
 
 	ret = gpio_request_by_name(dev, "snps,reset-gpio", 0,
-		&priv->reset_gpio, reset_flags);
+				   &priv->reset_gpio, reset_flags);
 	if (ret == 0) {
 		ret = dev_read_u32_array(dev, "snps,reset-delays-us",
 					 dw_pdata->reset_delays, 3);
@@ -866,3 +892,84 @@ static struct pci_device_id supported[] = {
 };
 
 U_BOOT_PCI_DEVICE(eth_designware, supported);
+
+#if defined(CONFIG_BITBANGMII) && CONFIG_IS_ENABLED(DM_GPIO)
+int dw_eth_bb_init(struct bb_miiphy_bus *bus)
+{
+	return 0;
+}
+
+static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus)
+{
+	struct dw_eth_dev *priv = bus->priv;
+	struct gpio_desc *desc = &priv->mdio_gpio;
+	desc->flags = 0;
+	dm_gpio_set_dir_flags(&priv->mdio_gpio, GPIOD_IS_OUT);
+
+	return 0;
+}
+
+static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus)
+{
+	struct dw_eth_dev *priv = bus->priv;
+	struct gpio_desc *desc = &priv->mdio_gpio;
+	desc->flags = 0;
+	dm_gpio_set_dir_flags(&priv->mdio_gpio, GPIOD_IS_IN);
+
+	return 0;
+}
+
+static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
+{
+	struct dw_eth_dev *priv = bus->priv;
+
+	if (v)
+		dm_gpio_set_value(&priv->mdio_gpio, 1);
+	else
+		dm_gpio_set_value(&priv->mdio_gpio, 0);
+
+	return 0;
+}
+
+static int dw_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
+{
+	struct dw_eth_dev *priv = bus->priv;
+
+	*v = dm_gpio_get_value(&priv->mdio_gpio);
+	return 0;
+}
+
+static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
+{
+	struct dw_eth_dev *priv = bus->priv;
+
+	if (v)
+		dm_gpio_set_value(&priv->mdc_gpio, 1);
+	else
+		dm_gpio_set_value(&priv->mdc_gpio, 0);
+
+	return 0;
+}
+
+static int dw_eth_bb_delay(struct bb_miiphy_bus *bus)
+{
+	udelay(1);
+
+	return 0;
+}
+
+struct bb_miiphy_bus bb_miiphy_buses[] = {
+	{
+		.name		= "dw_eth_bb",
+		.init		= dw_eth_bb_init,
+		.mdio_active	= dw_eth_bb_mdio_active,
+		.mdio_tristate	= dw_eth_bb_mdio_tristate,
+		.set_mdio	= dw_eth_bb_set_mdio,
+		.get_mdio	= dw_eth_bb_get_mdio,
+		.set_mdc	= dw_eth_bb_set_mdc,
+		.delay		= dw_eth_bb_delay,
+	}
+};
+
+int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);
+#endif
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 9da4e902cb..68ca5d9cd0 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -235,6 +235,9 @@ struct dw_eth_dev {
 	struct eth_dma_regs *dma_regs_p;
 #if CONFIG_IS_ENABLED(DM_GPIO)
 	struct gpio_desc reset_gpio;
+	struct gpio_desc mdc_gpio;
+	struct gpio_desc mdio_gpio;
+	int mdio_val;
 #endif
 #ifdef CONFIG_CLK
 	struct clk *clocks;	/* clock list */
-- 
2.17.1