[PATCH v3 01/95] mtd: Drop unused kb9202_nand driver
Michael Nazzareno Trimarchi
michael at amarulasolutions.com
Tue Feb 14 11:53:50 CET 2023
Hi Simon
On Mon, Feb 13, 2023 at 12:17 AM Simon Glass <sjg at chromium.org> wrote:
>
> This is not used since time out of mind.
>
> Drop the driver and Kconfig option.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> (no changes since v1)
>
> drivers/mtd/nand/raw/Makefile | 1 -
> drivers/mtd/nand/raw/kb9202_nand.c | 134 -----------------------------
> 2 files changed, 135 deletions(-)
> delete mode 100644 drivers/mtd/nand/raw/kb9202_nand.c
>
> diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
> index 666323e2219..add2b4cf655 100644
> --- a/drivers/mtd/nand/raw/Makefile
> +++ b/drivers/mtd/nand/raw/Makefile
> @@ -56,7 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o
> obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
> obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
> obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
> -obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
> obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
> obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
> obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
> diff --git a/drivers/mtd/nand/raw/kb9202_nand.c b/drivers/mtd/nand/raw/kb9202_nand.c
> deleted file mode 100644
> index 9d26532c780..00000000000
> --- a/drivers/mtd/nand/raw/kb9202_nand.c
> +++ /dev/null
> @@ -1,134 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * (C) Copyright 2006
> - * KwikByte <kb9200_dev at kwikbyte.com>
> - *
> - * (C) Copyright 2009
> - * Matthias Kaehlcke <matthias at kaehlcke.net>
> - */
> -
> -#include <common.h>
> -#include <linux/mtd/rawnand.h>
> -#include <asm/io.h>
> -#include <asm/arch/AT91RM9200.h>
> -#include <asm/arch/hardware.h>
> -
> -#include <nand.h>
> -
> -/*
> - * hardware specific access to control-lines
> - */
> -
> -#define MASK_ALE (1 << 22) /* our ALE is A22 */
> -#define MASK_CLE (1 << 21) /* our CLE is A21 */
> -
> -#define KB9202_NAND_NCE (1 << 28) /* EN* on D28 */
> -#define KB9202_NAND_BUSY (1 << 29) /* RB* on D29 */
> -
> -#define KB9202_SMC2_NWS (1 << 2)
> -#define KB9202_SMC2_TDF (1 << 8)
> -#define KB9202_SMC2_RWSETUP (1 << 24)
> -#define KB9202_SMC2_RWHOLD (1 << 29)
> -
> -/*
> - * Board-specific function to access device control signals
> - */
> -static void kb9202_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
> -{
> - struct nand_chip *this = mtd_to_nand(mtd);
> -
> - if (ctrl & NAND_CTRL_CHANGE) {
> - ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
> -
> - /* clear ALE and CLE bits */
> - IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
> -
> - if (ctrl & NAND_CLE)
> - IO_ADDR_W |= MASK_CLE;
> -
> - if (ctrl & NAND_ALE)
> - IO_ADDR_W |= MASK_ALE;
> -
> - this->IO_ADDR_W = (void *) IO_ADDR_W;
> -
> - if (ctrl & NAND_NCE)
> - writel(KB9202_NAND_NCE, AT91C_PIOC_CODR);
> - else
> - writel(KB9202_NAND_NCE, AT91C_PIOC_SODR);
> - }
> -
> - if (cmd != NAND_CMD_NONE)
> - writeb(cmd, this->IO_ADDR_W);
> -}
> -
> -
> -/*
> - * Board-specific function to access the device ready signal.
> - */
> -static int kb9202_nand_ready(struct mtd_info *mtd)
> -{
> - return readl(AT91C_PIOC_PDSR) & KB9202_NAND_BUSY;
> -}
> -
> -
> -/*
> - * Board-specific NAND init. Copied from include/linux/mtd/nand.h for reference.
> - *
> - * struct nand_chip - NAND Private Flash Chip Data
> - * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
> - * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
> - * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
> - * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
> - * If set to NULL no access to ready/busy is available and the ready/busy information
> - * is read from the chip status register
> - * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
> - * be provided if a hardware ECC is available
> - * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
> - * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
> - * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
> - * special functionality. See the defines for further explanation
> -*/
> -/*
> - * This routine initializes controller and GPIOs.
> - */
> -int board_nand_init(struct nand_chip *nand)
> -{
> - unsigned int value;
> -
> - nand->ecc.mode = NAND_ECC_SOFT;
> - nand->cmd_ctrl = kb9202_nand_hwcontrol;
> - nand->dev_ready = kb9202_nand_ready;
> -
> - /* in case running outside of bootloader */
> - writel(1 << AT91C_ID_PIOC, AT91C_PMC_PCER);
> -
> - /* setup nand flash access (allow ample margin) */
> - /* 4 wait states, 1 setup, 1 hold, 1 float for 8-bit device */
> - writel(AT91C_SMC2_WSEN | KB9202_SMC2_NWS | KB9202_SMC2_TDF |
> - AT91C_SMC2_DBW_8 | KB9202_SMC2_RWSETUP | KB9202_SMC2_RWHOLD,
> - AT91C_SMC_CSR3);
> -
> - /* enable internal NAND controller */
> - value = readl(AT91C_EBI_CSA);
> - value |= AT91C_EBI_CS3A_SMC_SmartMedia;
> - writel(value, AT91C_EBI_CSA);
> -
> - /* enable SMOE/SMWE */
> - writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_ASR);
> - writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_PDR);
> - writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_OER);
> -
> - /* set NCE to high */
> - writel(KB9202_NAND_NCE, AT91C_PIOC_SODR);
> -
> - /* disable output on pin connected to the busy line of the NAND */
> - writel(KB9202_NAND_BUSY, AT91C_PIOC_ODR);
> -
> - /* enable the PIO to control NCE and BUSY */
> - writel(KB9202_NAND_NCE | KB9202_NAND_BUSY, AT91C_PIOC_PER);
> -
> - /* enable output for NCE */
> - writel(KB9202_NAND_NCE, AT91C_PIOC_OER);
> -
> - return (0);
> -}
> --
> 2.39.1.581.gbfd45094c4-goog
>
Acked-by: Michael Trimarchi <michael at amarulasolutions.com>
For the mtd changes
Michael
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael at amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info at amarulasolutions.com
www.amarulasolutions.com
More information about the U-Boot
mailing list