[PATCH v1 05/18] clk: rockchip: Add rk3588 clk support

[Eugen Hristev]

On 2/16/23 11:02, Jagan Teki wrote:
> Hi Eugen,
> 
> On Thu, 16 Feb 2023 at 14:30, Eugen Hristev <eugen.hristev at collabora.com> wrote:
>>
>> On 1/30/23 16:57, Jagan Teki wrote:
>>> Add clock driver support for Rockchip RK3588 SoC.
>>>
>>> Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>
>>> Signed-off-by: Jagan Teki <jagan at edgeble.ai>
>>> ---
>>>    drivers/clk/rockchip/Makefile     |    1 +
>>>    drivers/clk/rockchip/clk_rk3588.c | 1996 +++++++++++++++++++++++++++++
>>>    2 files changed, 1997 insertions(+)
>>>    create mode 100644 drivers/clk/rockchip/clk_rk3588.c
>>>
>>> diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
>>> index f719f4e379..9e379cc2e3 100644
>>> --- a/drivers/clk/rockchip/Makefile
>>> +++ b/drivers/clk/rockchip/Makefile
>>> @@ -16,5 +16,6 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
>>>    obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
>>>    obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
>>>    obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
>>> +obj-$(CONFIG_ROCKCHIP_RK3588) += clk_rk3588.o
>>>    obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
>>>    obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
>>> diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
>>
>>
>> Hello Jagan,
>>
>> Have you noticed my questions on your previous version? I don't see any
>> changes in your current version on these aspects:
>>
>> https://patchwork.ozlabs.org/project/uboot/patch/20230125222741.303259-6-jagan@edgeble.ai/
>>
>> and here
>>
>> https://patchwork.ozlabs.org/project/uboot/patch/20230125222741.303259-12-jagan@edgeble.ai/
> 
> Sorry for the late response, I will respond to it on that thread.
> 
> Thanks,
> Jagan.


Sorry, I was wrong, you did some changes, now the print messages are 
removed from the code, so no more errors are printed.
I don't know if this is the right way though.

I am testing your patches on the rk3588 rock5b and come back with any 
findings.

Have you figured out what to do with the SDMMC init clock (400 kHz) ? 
This still appears to be broken

Thanks,
Eugen