[PATCH 3/4] mtd/fpga: add fpga directory to mtd (with Cyclone 10)

[Ulf Samuelsson]

Den 2023-02-21 kl. 10:08, skrev Michael Walle:
>>> If it is right or wrong to use that as an MTD is a matter of opinion.
>> I am still hoping the MTD maintainer would provide input here.
> I might be missing something, but what is the reasoning here, to add this
> to the mtd subsystem? One is saving space, but I agree with Marek, this
> isn't a valid argument to just put any (unrelated) stuff into the MTD
> subsystem.
>
> Also, as Marek pointed out, there are many different 'programming'
> solutions for CPLDs/FPGAs and most of them don't share anything with
> MTD. You seem to be just focusing on the "passive serial" one.
Yes, the passive serial is very different from the other ways of 
configuring an FPGA.

It is write only. You cannot read back the configuration and no partial 
reconfiguration.

You do not have to go through AXI/PCIe busses.

You access through an SPI device, but todays solution does not support 
using the SPI driver.

>
> Now, I saw you mentioned that
>
>   | the current passive serial solutions does not use the existing SPI
>   | drivers.
>
> What do you mean with SPI drivers? SPI flash drivers or SPI controller
> drivers? Does the "passive serial solution" expose an SPI bus and you
> can access the SPI flash on it in a generic way? Then the solution
> should be to write a SPI (controller) driver, the flash should then
> be automatically be detected.

The proposed solution is similar to an SPI flash driver.

The FPGA bitstream is typically stored in the CPU boot flash.

The CPU reads the bitstream and does an SPI transfer to the FPGA.

The FPGA is not connected to any flash memory.


The FPGA chip exposes (in SPI terms) SCK, nCS and MOSI, but not MISO so 
you cannot read back anything.

The driver will return an empty block on read.

The SPI transfer to configure the FPGA is doing

* toggle a GPIO signal (nCONFIG)

* Do an SPI write (using the SPI controller driver)

* After the SPI transfer complete, you check the status of some GPIO 
(nSTATUS etc.).

This is all hidden from the MTD.

What the MTD subsystem sees is a "write-only memory" that has to be 
written with exactly 'n' bytes.

The additional features of MTD simplifies the user interaction by 
exposing a device and
providing info on the device.


The only difference the MTD subsystem would see is
that there is a new subdirectory "fpga" with drivers
and the Kconfig + Makefile changes to support the directory.
Otherwise it plugs right in.


====

The current solutions for passive serial cannot use the SPI controller 
driver
so each board implements SPI controller inside their 'board' files.
You cannot reuse this code in practice, so every one that wants to
have passive serial has to write their own SPI access routines.

====
The FPGA manager does not support device tree, and I will not
be able to spend time on introducing this, as Marek advices.

Best Regards
Ulf Samuelsson

>
> -michael

-- 
Best Regards,
Ulf Samuelsson
eMagii
+46 722 427437
ulf at emagii.com