[PATCH 11/11] rockchip: rk3568: Read cpuid from otp

Kever Yang kever.yang at rock-chips.com
Wed Feb 22 09:56:58 CET 2023


On 2023/2/16 07:49, Jonas Karlman wrote:
> The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
> Add and use a CFG_CPUID_OFFSET to define this offset.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk356x-u-boot.dtsi   | 12 ++++++++++++
>   arch/arm/mach-rockchip/Kconfig    |  2 ++
>   arch/arm/mach-rockchip/board.c    |  2 +-
>   include/configs/rk3568_common.h   |  3 +++
>   include/configs/rockchip-common.h |  2 ++
>   5 files changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
> index ccb8db0001a4..4262afce768d 100644
> --- a/arch/arm/dts/rk356x-u-boot.dtsi
> +++ b/arch/arm/dts/rk356x-u-boot.dtsi
> @@ -20,6 +20,18 @@
>   		u-boot,dm-pre-reloc;
>   		status = "okay";
>   	};
> +
> +	otp: nvmem at fe38c000 {
> +		compatible = "rockchip,rk3568-otp";
> +		reg = <0x0 0xfe38c000 0x0 0x4000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		status = "okay";
> +
> +		otp_id: id at a {
> +			reg = <0x0a 0x10>;
> +		};
> +	};
>   };
>   
>   &cru {
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index b678ec41318e..998c6e88e4aa 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -287,6 +287,8 @@ config ROCKCHIP_RK3568
>   	select SYSCON
>   	select BOARD_LATE_INIT
>   	imply ROCKCHIP_COMMON_BOARD
> +	imply ROCKCHIP_OTP
> +	imply MISC_INIT_R
>   	help
>   	  The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
>   	  including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
> diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
> index ebffb6c3ff0c..f1f70c81d0ca 100644
> --- a/arch/arm/mach-rockchip/board.c
> +++ b/arch/arm/mach-rockchip/board.c
> @@ -323,7 +323,7 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
>   #ifdef CONFIG_MISC_INIT_R
>   __weak int misc_init_r(void)
>   {
> -	const u32 cpuid_offset = 0x7;
> +	const u32 cpuid_offset = CFG_CPUID_OFFSET;
>   	const u32 cpuid_length = 0x10;
>   	u8 cpuid[cpuid_length];
>   	int ret;
> diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
> index ae360105d508..e4004d19ee37 100644
> --- a/include/configs/rk3568_common.h
> +++ b/include/configs/rk3568_common.h
> @@ -8,6 +8,9 @@
>   
>   #include "rockchip-common.h"
>   
> +#undef CFG_CPUID_OFFSET
> +#define CFG_CPUID_OFFSET	0xa
> +
>   #define CFG_IRAM_BASE		0xfdcc0000
>   
>   #define CFG_SYS_SDRAM_BASE		0
> diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
> index ff8123dabd69..b62c32f02bdb 100644
> --- a/include/configs/rockchip-common.h
> +++ b/include/configs/rockchip-common.h
> @@ -7,6 +7,8 @@
>   #define _ROCKCHIP_COMMON_H_
>   #include <linux/sizes.h>
>   
> +#define CFG_CPUID_OFFSET	0x7
> +
>   /* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */
>   
>   #ifndef CONFIG_SPL_BUILD


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