[PATCH V7 15/15] iot2050: Add support for configuring M.2 connector
Jan Kiszka
jan.kiszka at siemens.com
Tue Feb 28 19:19:23 CET 2023
From: Jan Kiszka <jan.kiszka at siemens.com>
The M.2 slots of the related IOT2050 variant need to be configured
according to the plugged cards. This tries to detect the card using the
M.2 configuration pins of the B-key slot. If that fails, a U-Boot
environment variable can be set to configure manually. This variable is
write-permitted also in secure boot mode as it is not able to undermine
the integrity of the booted system.
The configuration is then applied to mux the serdes and to fix up the
device tree passed to or loaded by the bootloader. The fix-ups are
coming from device tree overlays that are embedded into the firmware
image and there also integrity protected. The OS remains free to load
a device tree to which they do not apply: U-Boot will not fail to boot
in that case.
Based on original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
arch/arm/dts/Makefile | 4 +-
arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 38 ++-
...050-advanced-m2-bkey-ekey-pcie-overlay.dts | 27 ++
...-iot2050-advanced-m2-bkey-usb3-overlay.dts | 47 ++++
board/siemens/iot2050/board.c | 259 +++++++++++++++++-
doc/board/siemens/iot2050.rst | 18 ++
include/configs/iot2050.h | 1 +
7 files changed, 391 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts
create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8e9e2bf9a42..0bfc69ecc86 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1254,7 +1254,9 @@ dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am6528-iot2050-basic-pg2.dtb \
k3-am6548-iot2050-advanced.dtb \
k3-am6548-iot2050-advanced-pg2.dtb \
- k3-am6548-iot2050-advanced-m2.dtb
+ k3-am6548-iot2050-advanced-m2.dtb \
+ k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \
+ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \
diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
index a2fc8bbc123..03ccc543293 100644
--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
@@ -61,6 +61,36 @@
};
};
+#ifdef CONFIG_TARGET_IOT2050_A53_PG2
+ bkey-usb3-overlay {
+ description = "M.2-bkey-usb3-overlay";
+ type = "blob";
+ load = <0x82100000>;
+ arch = "arm64";
+ compression = "none";
+ blob-ext {
+ filename = "k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo";
+ };
+ hash {
+ algo = "sha256";
+ };
+ };
+
+ bkey-ekey-pcie-overlay {
+ description = "M.2-bkey-ekey-pcie-overlay";
+ type = "blob";
+ load = <0x82110000>;
+ arch = "arm64";
+ compression = "none";
+ blob-ext {
+ filename = "k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo";
+ };
+ hash {
+ algo = "sha256";
+ };
+ };
+#endif
+
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
k3-rti-wdt-firmware {
type = "firmware";
@@ -84,9 +114,15 @@
description = "NAME";
firmware = "u-boot";
fdt = "fdt-SEQ";
+ loadables =
+#ifdef CONFIG_TARGET_IOT2050_A53_PG2
+ "bkey-usb3-overlay",
+ "bkey-ekey-pcie-overlay",
+#endif
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- loadables = "k3-rti-wdt-firmware";
+ "k3-rti-wdt-firmware",
#endif
+ <>;
signature {
sign-images = "firmware", "fdt", "loadables";
};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts
new file mode 100644
index 00000000000..c9e736098f9
--- /dev/null
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * IOT2050 M.2 variant, overlay for B-key PCIE0_LANE0 + E-key PCIE1_LANE0
+ * Copyright (c) Siemens AG, 2022
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng at siemens.com>
+ * Jan Kiszka <jan.kiszka at siemens.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&pcie0_rc {
+ num-lanes = <1>;
+ phys = <&serdes0 PHY_TYPE_PCIE 1>;
+ phy-names = "pcie-phy0";
+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie1_rc {
+ status = "okay";
+};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts
new file mode 100644
index 00000000000..72fc011bd54
--- /dev/null
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * IOT2050 M.2 variant, overlay for B-key USB3.0 + E-key PCIE1_LANE0
+ * Copyright (c) Siemens AG, 2022
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng at siemens.com>
+ * Jan Kiszka <jan.kiszka at siemens.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&serdes0 {
+ assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
+};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie1_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&minipcie_pins_default>;
+
+ num-lanes = <1>;
+ phys = <&serdes1 PHY_TYPE_PCIE 0>;
+ phy-names = "pcie-phy0";
+ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&dwc3_0 {
+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
+ <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
+ phys = <&serdes0 PHY_TYPE_USB3 0>;
+ phy-names = "usb3-phy";
+};
+
+&usb0 {
+ maximum-speed = "super-speed";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+};
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index 2735ae3fb74..df705b7c971 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Board specific initialization for IOT2050
- * Copyright (c) Siemens AG, 2018-2021
+ * Copyright (c) Siemens AG, 2018-2022
*
* Authors:
* Le Jin <le.jin at siemens.com>
@@ -11,9 +11,11 @@
#include <common.h>
#include <bootstage.h>
#include <dm.h>
+#include <fdt_support.h>
#include <i2c.h>
#include <led.h>
#include <malloc.h>
+#include <mapmem.h>
#include <net.h>
#include <phy.h>
#include <spl.h>
@@ -47,6 +49,114 @@ struct iot2050_info {
DECLARE_GLOBAL_DATA_PTR;
+struct gpio_config {
+ const char *gpio_name;
+ const char *label;
+};
+
+enum m2_connector_mode {
+ BKEY_PCIEX2 = 0,
+ BKEY_PCIE_EKEY_PCIE,
+ BKEY_USB30_EKEY_PCIE,
+ CONNECTOR_MODE_INVALID
+};
+
+struct m2_config_pins {
+ int config[4];
+};
+
+struct serdes_mux_control {
+ int ctrl_usb30_pcie0_lane0;
+ int ctrl_pcie1_pcie0;
+ int ctrl_usb30_pcie0_lane1;
+};
+
+struct m2_config_table {
+ struct m2_config_pins config_pins;
+ enum m2_connector_mode mode;
+};
+
+static const struct gpio_config serdes_mux_ctl_pin_info[] = {
+ {"gpio at 600000_88", "CTRL_USB30_PCIE0_LANE0"},
+ {"gpio at 600000_82", "CTRL_PCIE1_PCIE0"},
+ {"gpio at 600000_89", "CTRL_USB30_PCIE0_LANE1"},
+};
+
+static const struct gpio_config m2_bkey_cfg_pin_info[] = {
+ {"gpio at 601000_18", "KEY_CONFIG_0"},
+ {"gpio at 601000_19", "KEY_CONFIG_1"},
+ {"gpio at 601000_88", "KEY_CONFIG_2"},
+ {"gpio at 601000_89", "KEY_CONFIG_3"},
+};
+
+static const struct m2_config_table m2_config_table[] = {
+ {{{0, 1, 0, 0}}, BKEY_PCIEX2},
+ {{{0, 0, 1, 0}}, BKEY_PCIE_EKEY_PCIE},
+ {{{0, 1, 1, 0}}, BKEY_PCIE_EKEY_PCIE},
+ {{{1, 0, 0, 1}}, BKEY_PCIE_EKEY_PCIE},
+ {{{1, 1, 0, 1}}, BKEY_PCIE_EKEY_PCIE},
+ {{{0, 0, 0, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 1, 0, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 1, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{1, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+};
+
+static const struct serdes_mux_control serdes_mux_ctrl[] = {
+ [BKEY_PCIEX2] = {0, 0, 1},
+ [BKEY_PCIE_EKEY_PCIE] = {0, 1, 0},
+ [BKEY_USB30_EKEY_PCIE] = {1, 1, 0},
+};
+
+static const char *m2_connector_mode_name[] = {
+ [BKEY_PCIEX2] = "PCIe x2 (key B)",
+ [BKEY_PCIE_EKEY_PCIE] = "PCIe (key B) / PCIe (key E)",
+ [BKEY_USB30_EKEY_PCIE] = "USB 3.0 (key B) / PCIe (key E)",
+};
+
+static enum m2_connector_mode connector_mode;
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+static void *connector_overlay;
+static u32 connector_overlay_size;
+#endif
+
+static int get_pinvalue(const char *gpio_name, const char *label)
+{
+ struct gpio_desc gpio;
+
+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 ||
+ dm_gpio_request(&gpio, label) < 0 ||
+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN) < 0) {
+ pr_err("Cannot get pin %s for M.2 configuration\n", gpio_name);
+ return 0;
+ }
+
+ return dm_gpio_get_value(&gpio);
+}
+
+static void set_pinvalue(const char *gpio_name, const char *label, int value)
+{
+ struct gpio_desc gpio;
+
+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 ||
+ dm_gpio_request(&gpio, label) < 0 ||
+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_OUT) < 0) {
+ pr_err("Cannot set pin %s for M.2 configuration\n", gpio_name);
+ return;
+ }
+ dm_gpio_set_value(&gpio, value);
+}
+
+static bool board_is_m2(void)
+{
+ struct iot2050_info *info = IOT2050_INFO_DATA;
+
+ return IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG2) &&
+ info->magic == IOT2050_INFO_MAGIC &&
+ strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0;
+}
+
static bool board_is_advanced(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
@@ -103,6 +213,8 @@ void set_board_info_env(void)
if (board_is_advanced()) {
if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1))
fdtfile = "ti/k3-am6548-iot2050-advanced.dtb";
+ else if(board_is_m2())
+ fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb";
else
fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb";
} else {
@@ -118,6 +230,101 @@ void set_board_info_env(void)
env_save();
}
+static void m2_overlay_prepare(void)
+{
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+ const char *overlay_path;
+ void *overlay;
+ u64 loadaddr;
+ ofnode node;
+ int ret;
+
+ if (connector_mode == BKEY_PCIEX2)
+ return;
+
+ if (connector_mode == BKEY_PCIE_EKEY_PCIE)
+ overlay_path = "/fit-images/bkey-ekey-pcie-overlay";
+ else
+ overlay_path = "/fit-images/bkey-usb3-overlay";
+
+ node = ofnode_path(overlay_path);
+ if (!ofnode_valid(node))
+ goto fit_error;
+
+ ret = ofnode_read_u64(node, "load", &loadaddr);
+ if (ret)
+ goto fit_error;
+
+ ret = ofnode_read_u32(node, "size", &connector_overlay_size);
+ if (ret)
+ goto fit_error;
+
+ overlay = map_sysmem(loadaddr, connector_overlay_size);
+
+ connector_overlay = malloc(connector_overlay_size);
+ if (!connector_overlay)
+ goto fit_error;
+
+ memcpy(connector_overlay, overlay, connector_overlay_size);
+ return;
+
+fit_error:
+ pr_err("M.2 device tree overlay %s not available,\n", overlay_path);
+#endif
+}
+
+static void m2_connector_setup(void)
+{
+ ulong m2_manual_config = env_get_ulong("m2_manual_config", 10,
+ CONNECTOR_MODE_INVALID);
+ const char *mode_info = "";
+ struct m2_config_pins config_pins;
+ unsigned int n;
+
+ /* enable M.2 connector power */
+ set_pinvalue("gpio at 601000_17", "P3V3_M2_EN", 1);
+ udelay(4 * 100);
+
+ if (m2_manual_config < CONNECTOR_MODE_INVALID) {
+ mode_info = " [manual mode]";
+ connector_mode = m2_manual_config;
+ } else { /* auto detection */
+ for (n = 0; n < ARRAY_SIZE(config_pins.config); n++)
+ config_pins.config[n] =
+ get_pinvalue(m2_bkey_cfg_pin_info[n].gpio_name,
+ m2_bkey_cfg_pin_info[n].label);
+ connector_mode = CONNECTOR_MODE_INVALID;
+ for (n = 0; n < ARRAY_SIZE(m2_config_table); n++) {
+ if (!memcmp(config_pins.config,
+ m2_config_table[n].config_pins.config,
+ sizeof(config_pins.config))) {
+ connector_mode = m2_config_table[n].mode;
+ break;
+ }
+ }
+ if (connector_mode == CONNECTOR_MODE_INVALID) {
+ mode_info = " [fallback, card unknown/unsupported]";
+ connector_mode = BKEY_USB30_EKEY_PCIE;
+ }
+ }
+
+ printf("M.2: %s%s\n", m2_connector_mode_name[connector_mode],
+ mode_info);
+
+ /* configure serdes mux */
+ set_pinvalue(serdes_mux_ctl_pin_info[0].gpio_name,
+ serdes_mux_ctl_pin_info[0].label,
+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane0);
+ set_pinvalue(serdes_mux_ctl_pin_info[1].gpio_name,
+ serdes_mux_ctl_pin_info[1].label,
+ serdes_mux_ctrl[connector_mode].ctrl_pcie1_pcie0);
+ set_pinvalue(serdes_mux_ctl_pin_info[2].gpio_name,
+ serdes_mux_ctl_pin_info[2].label,
+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane1);
+
+ m2_overlay_prepare();
+}
+
int board_init(void)
{
return 0;
@@ -215,6 +422,9 @@ int board_late_init(void)
/* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */
writel(0x3, SERDES0_LANE_SELECT);
+ if (board_is_m2())
+ m2_connector_setup();
+
set_board_info_env();
/* remove the eMMC if requested via button */
@@ -226,6 +436,50 @@ int board_late_init(void)
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+static void m2_fdt_fixup(void *blob)
+{
+ void *overlay_copy = NULL;
+ void *fdt_copy = NULL;
+ u32 fdt_size;
+ int err;
+
+ if (!connector_overlay)
+ return;
+
+ /*
+ * We need to work with temporary copies here because fdt_overlay_apply
+ * is destructive to the overlay and also to the target blob, even if
+ * application fails.
+ */
+ fdt_size = fdt_totalsize(blob);
+ fdt_copy = malloc(fdt_size);
+ if (!fdt_copy)
+ goto fixup_error;
+
+ memcpy(fdt_copy, blob, fdt_size);
+
+ overlay_copy = malloc(connector_overlay_size);
+ if (!overlay_copy)
+ goto fixup_error;
+
+ memcpy(overlay_copy, connector_overlay, connector_overlay_size);
+
+ err = fdt_overlay_apply_verbose(fdt_copy, overlay_copy);
+ if (err)
+ goto fixup_error;
+
+ memcpy(blob, fdt_copy, fdt_size);
+
+cleanup:
+ free(fdt_copy);
+ free(overlay_copy);
+ return;
+
+fixup_error:
+ pr_err("Could not apply M.2 device tree overlay\n");
+ goto cleanup;
+}
+
int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
@@ -237,6 +491,9 @@ int ft_board_setup(void *blob, struct bd_info *bd)
if (ret)
pr_err("%s: fixing up msmc ram failed %d\n", __func__, ret);
+ if (board_is_m2())
+ m2_fdt_fixup(blob);
+
return ret;
}
#endif
diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst
index 442d2cac216..074d6aa15af 100644
--- a/doc/board/siemens/iot2050.rst
+++ b/doc/board/siemens/iot2050.rst
@@ -145,3 +145,21 @@ Flash signed flash.bin
The signing has happen in-place in flash.bin, thus the flashing procedure
described above.
+
+M.2 slot configuration
+----------------------
+
+The M.2 variant of the IOT2050 comes with one B-keyed and one E-keyed slot.
+These are configured by U-Boot depending on the detected usage (auto
+configuration). The device tree loaded later on for the OS will be fixed up
+by U-Boot according to this configuration.
+
+For the case auto configuration does not work reliably, it is possible to set
+the U-Boot environment variable "m2_manual_config" to select the mode manually:
+
+"0" - B-key: PCIe x2, USB 2.0
+ E-key: USB 2.0
+"1" - B-key: PCIe, USB 2.0
+ E-key: PCIe, USB 2.0
+"2" - B-key: USB 3.0,
+ E-key: PCIe, USB 2.0
diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h
index 217719472e5..82174b8678b 100644
--- a/include/configs/iot2050.h
+++ b/include/configs/iot2050.h
@@ -44,6 +44,7 @@
#define CFG_ENV_FLAGS_LIST_STATIC \
"board_uuid:sw,board_name:sw,board_serial:sw,board_a5e:sw," \
"mlfb:sw,fw_version:sw,seboot_version:sw," \
+ "m2_manuel_config:sw," \
"eth1addr:mw,eth2addr:mw,watchdog_timeout_ms:dw,boot_targets:sw"
#endif
--
2.35.3
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