[PATCH 08/11] ARM: dts: renesas: Add R8A779F0 S4 DT extras

Marek Vasut marek.vasut+renesas at mailbox.org
Tue Feb 28 22:34:43 CET 2023


From: Hai Pham <hai.pham.ud at renesas.com>

Add R8A779F0 S4 DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud at renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
[Marek: Update compatible string to match latest upstream]
---
 arch/arm/dts/r8a779f0-u-boot.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 arch/arm/dts/r8a779f0-u-boot.dtsi

diff --git a/arch/arm/dts/r8a779f0-u-boot.dtsi b/arch/arm/dts/r8a779f0-u-boot.dtsi
new file mode 100644
index 00000000000..24b67248c09
--- /dev/null
+++ b/arch/arm/dts/r8a779f0-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on R-Car R8A779F0 SoC
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+/ {
+	soc {
+		rpc: spi at ee200000 {
+			compatible = "renesas,r8a779f0-rpc-if", "renesas,rcar-gen4-rpc-if";
+			reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+			resets = <&cpg 629>;
+			bank-width = <2>;
+			num-cs = <1>;
+			status = "disabled";
+		};
+	};
+};
+
+&extalr_clk {
+	u-boot,dm-pre-reloc;
+};
-- 
2.39.2



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