[PATCH v2] riscv: ae350: support openSBI 1.0+ which enable FW_PIC
Rick Chen
rickchen36 at gmail.com
Wed Jan 4 02:15:50 CET 2023
Hi Samuel
> On 1/3/23 02:18, Rick Chen wrote:
> > Original openSBI (without FW_PIC) will relocate itselt
>
> typo: itself
OK, I will fix it.
>
> > from 0x1000000 to 0x0. After openSBI added FW_PIC codes,
> > it will not relocate any more and alaways run at 0x1000000.
>
> typo: always
OK, I will fix it.
>
> > Hence, it may overlap with Kernel memory region. So it is
> > necessary to change openSBI address from 0x1000000 to 0x0.
> >
> > More details can refer to commit cb052d771200
> > ("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")
> >
> > Signed-off-by: Rick Chen <rick at andestech.com>
>
> Reviewed-by: Samuel Holland <samuel at sholland.org>
Thank you for reviewing.
Best Regards,
Rick
>
> > ---
> >
> > Changes in v2
> > - fix typo
> > - describe why is this change a must have
> >
> > ---
> >
> > board/AndesTech/ax25-ae350/Kconfig | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig
> > index 36b67f0b52..4bb33b0793 100644
> > --- a/board/AndesTech/ax25-ae350/Kconfig
> > +++ b/board/AndesTech/ax25-ae350/Kconfig
> > @@ -25,7 +25,7 @@ config SPL_TEXT_BASE
> > default 0x800000
> >
> > config SPL_OPENSBI_LOAD_ADDR
> > - default 0x01000000
> > + default 0x00000000
> >
> > config SYS_FDT_BASE
> > hex
> > --
> > 2.17.1
> >
>
More information about the U-Boot
mailing list