[PATCH v3] riscv: ae350: support openSBI 1.0+ which enable FW_PIC

Rick Chen rick at andestech.com
Wed Jan 4 03:07:43 CET 2023

Original openSBI (without FW_PIC) will relocate itself
from 0x1000000 to 0x0. After openSBI added FW_PIC codes,
it will not relocate any more and always run at 0x1000000.
Hence, it may overlap with Kernel memory region. So it is
necessary to change openSBI address from 0x1000000 to 0x0.

More details can refer to commit cb052d771200
("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")

Signed-off-by: Rick Chen <rick at andestech.com>
Reviewed-by: Samuel Holland <samuel at sholland.org>
Changes in v3
 - fix typos
 board/AndesTech/ax25-ae350/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig
index 36b67f0b52..4bb33b0793 100644
--- a/board/AndesTech/ax25-ae350/Kconfig
+++ b/board/AndesTech/ax25-ae350/Kconfig
@@ -25,7 +25,7 @@ config SPL_TEXT_BASE
 	default 0x800000
-	default 0x01000000
+	default 0x00000000
 config SYS_FDT_BASE

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