[PATCH v2 2/2] serial: mxc: Wait for TX completion before reset

[Fabio Estevam]

Hi Loic,

On Tue, Jan 10, 2023 at 9:41 AM Loic Poulain <loic.poulain at linaro.org> wrote:
>
> The u-boot console may show some corrupted characters when
> printing in board_init() due to reset of the UART (probe)
> before the TX FIFO has been completely drained.
>
> To fix this issue, and in case UART is still running, we now
> try to flush the FIFO before proceding to UART reinitialization.

s/proceding/proceeding

> For this we're waiting for Transmitter Complete bit, indicating
> that the FIFO and the shift register are empty.
>
> flushing has a 4ms timeout guard, which is normally more than
> enough to consume the FIFO @ low baudrate (9600bps).
>
> Signed-off-by: Loic Poulain <loic.poulain at linaro.org>
> ---
>  v2: Add this commit to the series

Should this patch come first in the series?

In case someone is bisecting, the current patch 1/2 may cause serial corruption,
which is fixed by 2/2.

Can we avoid corruption by swapping the order of these patches?