[PATCH 3/9] arm: dts: k3-am62-main: Add device tree node for TIDSS

Nikhil M Jain n-jain1 at ti.com
Fri Jan 13 09:29:21 CET 2023


Add device tree node which includes the register
regions to write properties of planes (vidl1 and vid1),
overlays (ovr1 and ovr2),and video ports(vp1 and vp2).
TIDSS uses 3 clocks, fck- for its internal logic and
clk vp1 and vp2 for oldi and HDMI ports.

To control the oldi panel its register region is added
in dss_oldi_io_ctrl.

Signed-off-by: Nikhil M Jain <n-jain1 at ti.com>
---
 arch/arm/dts/k3-am62-main.dtsi | 41 ++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 4b6ba98dd0..a70061050e 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -54,6 +54,11 @@
 			reg = <0x4044 0x8>;
 			#phy-cells = <1>;
 		};
+
+		dss_oldi_io_ctrl: dss-oldi-io-ctrl at 8600 {
+			compatible = "syscon";
+			reg = <0x8600 0x200>;
+		};
 	};
 
 	dmss: bus at 48000000 {
@@ -515,6 +520,42 @@
 		};
 	};
 
+	dss: dss at 30200000 {
+		compatible = "ti,am625-dss";
+		status = "okay";
+
+		reg = <0x00 0x30200000 0x00 0x1000>, /* common */
+		      <0x00 0x30201000 0x00 0x1000>, /* common1 */
+		      <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
+		      <0x00 0x30206000 0x00 0x1000>, /* vid */
+		      <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
+		      <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
+		      <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
+		      <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
+
+		reg-names = "common", "common1",
+			    "vidl1", "vid",
+			    "ovr1", "ovr2",
+			    "vp1", "vp2";
+
+		ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
+		power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
+
+		clocks = <&k3_clks 186 6>,
+			 <&k3_clks 186 0>,
+			 <&k3_clks 186 2>;
+
+		clock-names = "fck", "vp1", "vp2";
+
+		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+
+		dss_ports: ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
 	hwspinlock: spinlock at 2a000000 {
 		compatible = "ti,am64-hwspinlock";
 		reg = <0x00 0x2a000000 0x00 0x1000>;
-- 
2.17.1



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