[PATCH v1] arm: dts: rockchip: sync rk3066/rk3188 DT files from linux-next v6.2-rc4

[Quentin Schulz]

Hi Johan,

On 1/16/23 20:45, Johan Jonker wrote:
> Sync rk3066/rk3188 DT files from Linux.
> This is the state as of linux-next v6.2-rc4.
> New nfc node for MK808 rk3066a.
> CRU nodes now have a clock property.
> To prefend dtoc errors a fixed clock must also be
> included for tpl/spl in the rk3xxx-u-boot.dtsi file.
> 
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
> ---
>   arch/arm/dts/rk3066a-mk808.dts    | 27 ++++++++++++++++++++++++++-
>   arch/arm/dts/rk3066a.dtsi         |  3 ++-
>   arch/arm/dts/rk3188-radxarock.dts | 24 +++++++++++++-----------
>   arch/arm/dts/rk3188.dtsi          | 27 ++++++++++++++++-----------
>   arch/arm/dts/rk3xxx-u-boot.dtsi   |  4 ++++
>   arch/arm/dts/rk3xxx.dtsi          |  9 +++++++--
>   6 files changed, 68 insertions(+), 26 deletions(-)
> 
> diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
> index 667d57a4..06790f05 100644
> --- a/arch/arm/dts/rk3066a-mk808.dts
> +++ b/arch/arm/dts/rk3066a-mk808.dts
> @@ -32,7 +32,7 @@
>   		keyup-threshold-microvolt = <2500000>;
>   		poll-interval = <100>;
> 
> -		recovery {
> +		button-recovery {
>   			label = "recovery";
>   			linux,code = <KEY_VENDOR>;
>   			press-threshold-microvolt = <0>;
> @@ -157,7 +157,32 @@
>   	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
>   	pinctrl-names = "default";
>   	vmmc-supply = <&vcc_wifi>;
> +	#address-cells = <1>;
> +	#size-cells = <0>;
>   	status = "okay";
> +
> +	brcmf: wifi at 1 {
> +		compatible = "brcm,bcm4329-fmac";
> +		reg = <1>;
> +	};
> +};
> +
> +&nfc {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	nand at 0 {
> +		reg = <0>;
> +		label = "rk-nand";
> +		nand-bus-width = <8>;
> +		nand-ecc-mode = "hw";
> +		nand-ecc-step-size = <1024>;
> +		nand-ecc-strength = <40>;
> +		nand-is-boot-medium;
> +		rockchip,boot-blks = <8>;
> +		rockchip,boot-ecc-strength = <24>;
> +	};
>   };
> 
>   &pinctrl {
> diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
> index c25b9695..de9915d9 100644
> --- a/arch/arm/dts/rk3066a.dtsi
> +++ b/arch/arm/dts/rk3066a.dtsi
> @@ -202,8 +202,9 @@
>   	cru: clock-controller at 20000000 {
>   		compatible = "rockchip,rk3066a-cru";
>   		reg = <0x20000000 0x1000>;
> +		clocks = <&xin24m>;
> +		clock-names = "xin24m";
>   		rockchip,grf = <&grf>;
> -
>   		#clock-cells = <1>;
>   		#reset-cells = <1>;
>   		assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
> diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
> index e7138a4a..118deacd 100644
> --- a/arch/arm/dts/rk3188-radxarock.dts
> +++ b/arch/arm/dts/rk3188-radxarock.dts
> @@ -6,7 +6,6 @@
>   /dts-v1/;
>   #include <dt-bindings/input/input.h>
>   #include "rk3188.dtsi"
> -#include "rk3188-radxarock-u-boot.dtsi"
> 
>   / {
>   	model = "Radxa Rock";
> @@ -25,7 +24,7 @@
>   		compatible = "gpio-keys";
>   		autorepeat;
> 
> -		power {
> +		key-power {
>   			gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
>   			linux,code = <KEY_POWER>;
>   			label = "GPIO Key Power";
> @@ -72,7 +71,7 @@
>   		#sound-dai-cells = <0>;
>   	};
> 
> -	ir_recv: gpio-ir-receiver {
> +	ir_recv: ir-receiver {
>   		compatible = "gpio-ir-receiver";
>   		gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
>   		pinctrl-names = "default";
> @@ -127,18 +126,21 @@
>   };
> 
>   &emac {
> -	status = "okay";
> -
> +	phy = <&phy0>;
> +	phy-supply = <&vcc_rmii>;
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
> +	status = "okay";
> 
> -	phy = <&phy0>;
> -	phy-supply = <&vcc_rmii>;
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> 
> -	phy0: ethernet-phy at 0 {
> -		reg = <0>;
> -		interrupt-parent = <&gpio3>;
> -		interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
> +		phy0: ethernet-phy at 0 {
> +			reg = <0>;
> +			interrupt-parent = <&gpio3>;
> +			interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
> +		};
>   	};
>   };
> 
> diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
> index 9a80f83a..44b54af0 100644
> --- a/arch/arm/dts/rk3188.dtsi
> +++ b/arch/arm/dts/rk3188.dtsi
> @@ -54,7 +54,7 @@
>   		};
>   	};
> 
> -	cpu0_opp_table: opp_table0 {
> +	cpu0_opp_table: opp-table-0 {
>   		compatible = "operating-points-v2";
>   		opp-shared;
> 
> @@ -195,8 +195,9 @@
>   	cru: clock-controller at 20000000 {
>   		compatible = "rockchip,rk3188-cru";
>   		reg = <0x20000000 0x1000>;
> +		clocks = <&xin24m>;
> +		clock-names = "xin24m";
>   		rockchip,grf = <&grf>;
> -
>   		#clock-cells = <1>;
>   		#reset-cells = <1>;
>   	};
> @@ -223,7 +224,7 @@
>   		#size-cells = <1>;
>   		ranges;
> 
> -		gpio0: gpio0 at 2000a000 {
> +		gpio0: gpio at 2000a000 {
>   			compatible = "rockchip,rk3188-gpio-bank0";
>   			reg = <0x2000a000 0x100>;
>   			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> @@ -236,7 +237,7 @@
>   			#interrupt-cells = <2>;
>   		};
> 
> -		gpio1: gpio1 at 2003c000 {
> +		gpio1: gpio at 2003c000 {

I believe this is the same issue as on RK3399 and PX30: this breaks our 
GPIO controller driver.

c.f. 
https://lore.kernel.org/u-boot/0ab9a600-b517-0ce5-d189-99fc8eddfa60@theobroma-systems.com/ 
and its answers.

Cheers,
Quentin