[PATCH 5/5] spmi: msm: Fix up msm_spmi_write() for ARB V5

Sumit Garg sumit.garg at linaro.org
Thu Jan 19 09:48:40 CET 2023


On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
<alexeymin at postmarketos.org> wrote:
>
> In commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
> support for arbiter V5 was introduced, and msm_spmi_read() was
> correctly converted to use varying channel offset depending on
> ARB version. But msm_spmi_write() was not fully converted.
>
> Even though ch_offset variable was introduced, it was not used
> in read/write operations in that function. Fix this inconsistency,
> use calculated ch_offset instead of SPMI_CH_OFFSET(..).
>
> Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
>
> Signed-off-by: Alexey Minnekhanov <alexeymin at postmarketos.org>
> ---
>  drivers/spmi/spmi-msm.c | 19 ++++++++-----------
>  1 file changed, 8 insertions(+), 11 deletions(-)
>

Reviewed-by: Sumit Garg <sumit.garg at linaro.org>

-Sumit

> diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
> index 3df0f12c8b86..2174c10c920a 100644
> --- a/drivers/spmi/spmi-msm.c
> +++ b/drivers/spmi/spmi-msm.c
> @@ -92,13 +92,16 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
>                 return -EIO;
>
>         channel = priv->channel_map[usid][pid];
> +       if (priv->arb_ver == V5)
> +               ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
> +       else
> +               ch_offset = SPMI_CH_OFFSET(channel);
>
>         /* Disable IRQ mode for the current channel*/
> -       writel(0x0,
> -              priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
> +       writel(0x0, priv->spmi_core + ch_offset + SPMI_REG_CONFIG);
>
>         /* Write single byte */
> -       writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
> +       writel(val, priv->spmi_core + ch_offset + SPMI_REG_WDATA);
>
>         /* Prepare write command */
>         reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT;
> @@ -107,19 +110,13 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
>         reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT);
>         reg |= 1; /* byte count */
>
> -       if (priv->arb_ver == V5)
> -               ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
> -       else
> -               ch_offset = SPMI_CH_OFFSET(channel);
> -
>         /* Send write command */
> -       writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
> +       writel(reg, priv->spmi_core + ch_offset + SPMI_REG_CMD0);
>
>         /* Wait till CMD DONE status */
>         reg = 0;
>         while (!reg) {
> -               reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) +
> -                           SPMI_REG_STATUS);
> +               reg = readl(priv->spmi_core + ch_offset + SPMI_REG_STATUS);
>         }
>
>         if (reg ^ SPMI_STATUS_DONE) {
> --
> 2.38.2
>


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