[PATCH v2 14/17] riscv: dts: jh7110: Add initial StarFive JH7110 device tree

Sean Anderson seanga2 at gmail.com
Fri Jan 20 02:37:27 CET 2023


On 1/19/23 14:25, Conor Dooley wrote:
> On Thu, Jan 19, 2023 at 02:16:51PM -0500, Sean Anderson wrote:
>> On 1/19/23 13:30, Conor Dooley wrote:
>>> Hey Seán, David,
>>>
>>> On Thu, Jan 19, 2023 at 01:26:52AM -0500, Sean Anderson wrote:
>>>> On 1/19/23 01:18, David Abdurachmanov wrote:
>>>>> On Wed, Jan 18, 2023 at 10:19 AM Yanhong Wang
>>>>> <yanhong.wang at starfivetech.com> wrote:
>>>
>>>>>> +               U74_4: cpu at 4 {
>>>>>> +                       compatible = "sifive,u74-mc", "riscv";
>>>>>> +                       reg = <4>;
>>>>>> +                       d-cache-block-size = <64>;
>>>>>> +                       d-cache-sets = <64>;
>>>>>> +                       d-cache-size = <32768>;
>>>>>> +                       d-tlb-sets = <1>;
>>>>>> +                       d-tlb-size = <40>;
>>>>>> +                       device_type = "cpu";
>>>>>> +                       i-cache-block-size = <64>;
>>>>>> +                       i-cache-sets = <64>;
>>>>>> +                       i-cache-size = <32768>;
>>>>>> +                       i-tlb-sets = <1>;
>>>>>> +                       i-tlb-size = <40>;
>>>>>> +                       mmu-type = "riscv,sv39";
>>>>>> +                       next-level-cache = <&ccache>;
>>>>>> +                       riscv,isa = "rv64imafdcbsu";
>>>>>
>>>>> Looking at SiFive U74 manuals, shouldn't this be RV64GC_Zba_Zbb_Sscofpmf?
>>>>> U74 only supports Zba and Zbb bit manip extensions.
>>>>> This is from the 21G3.02.00 release manual.
>>>>>
>>>>> Looking more, S76 core is listed in the manual as supporting up to:
>>>>> RV64IMAC_Zicsr_Zifencei_Zba_Zbb_Sscofpmf.
>>>>>
>>>>> I almost forgot about _Zicsr_Zifencei (which are part of G). Shouldn't
>>>>> those be listed too in riscv,isa?
>>>
>>> AFAIU, Linux just assumes them since they weren't their own thing prior
>>> to ISA spec 20191213. I think in- & ex- cluding them are both valid...
>>> Yeah.
>>>
>>>> AFAIK we don't support Z/X in U-Boot.
>>>
>>> Does the U-Boot ISA string parsing not just ignore un-implemented
>>> extensions? If it does ignore things you don't implement, then I think
>>> including the Z extensions should be no harm.
>>> IMO, it'd be nice to have this string match whatever the hardware can
>>> support so that same Devicetree can be used for U-Boot & whatever OS it
>>> is booting.
>>
>> We use strchr on it; so something like Zicsr is parsed as 5 extensions.
> 
> oof, that's rough :(
> 
> Just waiting until someone comes along that *needs* one of these
> extensions to be functional?

Well, it's only called twice to check for floating point support and for S-mode
support. So I guess we'll cross that bridge when we come to it.

--Sean


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