[PATCH v2 2/2] mtd: spi-nor-core: Make CFRx reg fields generic
Tudor Ambarus
tudor.ambarus at linaro.org
Fri Jan 20 08:19:39 CET 2023
On 1/20/23 03:28, tkuw584924 at gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
>
> Cypress defines two flavors of configuration registers, volatile and
> non volatile, and both use the same bit fields. Rename the bitfields in
> the configuration registers so that they can be used for both flavors.
>
> Suggested-by: Tudor Ambarus <tudor.ambarus at linaro.org>
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus at linaro.org>
> ---
> drivers/mtd/spi/spi-nor-core.c | 8 ++++----
> include/linux/mtd/spi-nor.h | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index 1ea8363d9f89..a3198253ca63 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -3373,7 +3373,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor)
> if (ret)
> return ret;
>
> - buf = SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24;
> + buf = SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
> op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
> SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR2V, 1),
> SPI_MEM_OP_NO_DUMMY,
> @@ -3396,7 +3396,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor)
> if (ret)
> return ret;
>
> - buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
> + buf = SPINOR_REG_CYPRESS_CFR5_OCT_DTR_EN;
> op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
> SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR5V, 1),
> SPI_MEM_OP_NO_DUMMY,
> @@ -3444,7 +3444,7 @@ static int s28hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
> if (ret)
> return ret;
>
> - if (!(buf & SPINOR_REG_CYPRESS_CFR3V_UNISECT))
> + if (!(buf & SPINOR_REG_CYPRESS_CFR3_UNISECT))
> nor->erase = s28hx_t_erase_non_uniform;
>
> return spi_nor_default_setup(nor, info, params);
> @@ -3511,7 +3511,7 @@ static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
> if (ret)
> return ret;
>
> - if (buf & SPINOR_REG_CYPRESS_CFR3V_PGSZ)
> + if (buf & SPINOR_REG_CYPRESS_CFR3_PGSZ)
> params->page_size = 512;
> else
> params->page_size = 256;
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index 2fb4595fc756..605cddef4d06 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -189,15 +189,15 @@
> #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
> #define SPINOR_OP_S28_SE_4K 0x21
> #define SPINOR_REG_CYPRESS_CFR2V 0x00800003
> -#define SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24 0xb
> +#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
> #define SPINOR_REG_CYPRESS_CFR3V 0x00800004
> -#define SPINOR_REG_CYPRESS_CFR3V_PGSZ BIT(4) /* Page size. */
> -#define SPINOR_REG_CYPRESS_CFR3V_UNISECT BIT(3) /* Uniform sector mode */
> +#define SPINOR_REG_CYPRESS_CFR3_PGSZ BIT(4) /* Page size. */
> +#define SPINOR_REG_CYPRESS_CFR3_UNISECT BIT(3) /* Uniform sector mode */
> #define SPINOR_REG_CYPRESS_CFR5V 0x00800006
> #define SPINOR_REG_CYPRESS_CFR5_BIT6 BIT(6)
> #define SPINOR_REG_CYPRESS_CFR5_DDR BIT(1)
> #define SPINOR_REG_CYPRESS_CFR5_OPI BIT(0)
> -#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN \
> +#define SPINOR_REG_CYPRESS_CFR5_OCT_DTR_EN \
> (SPINOR_REG_CYPRESS_CFR5_BIT6 | SPINOR_REG_CYPRESS_CFR5_DDR | \
> SPINOR_REG_CYPRESS_CFR5_OPI)
> #define SPINOR_OP_CYPRESS_RD_FAST 0xee
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