[PATCH 28/41] imx9: imx93_evk: Update DDR timing config

[Peng Fan (OSS)]

From: Ye Li <ye.li at nxp.com>

Improve the DDR bandwidth by changing to auto precharge,
setting RD_TO_PRE to 0xe, REFREC_PB and REFTOREF_PB to 0x15b,
set RD/WR_CNT, and improve RWT/WRT frequency

Also reduce debug message to Stage completion only.

Reviewed-by: Peng Fan <peng.fan at nxp.com>
Signed-off-by: Ye Li <ye.li at nxp.com>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 board/freescale/imx93_evk/lpddr4x_timing.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/board/freescale/imx93_evk/lpddr4x_timing.c b/board/freescale/imx93_evk/lpddr4x_timing.c
index e34096fee1e..a355ca28c4f 100644
--- a/board/freescale/imx93_evk/lpddr4x_timing.c
+++ b/board/freescale/imx93_evk/lpddr4x_timing.c
@@ -21,21 +21,23 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
 	{ 0x4e300114, 0x2 },
 	{ 0x4e300260, 0x0 },
 	{ 0x4e30017c, 0x0 },
+	{ 0x4e300f04, 0x80 },
 	{ 0x4e300104, 0xaaee001b },
 	{ 0x4e300108, 0x626ee273 },
-	{ 0x4e30010c, 0x5c18b },
+	{ 0x4e30010c, 0x5e18b },
 	{ 0x4e300100, 0x25ab321b },
 	{ 0x4e300160, 0x9002 },
 	{ 0x4e30016c, 0x35f00000 },
 	{ 0x4e300250, 0x2b },
-	{ 0x4e300254, 0x0 },
+	{ 0x4e300254, 0x015b015b },
 	{ 0x4e30025c, 0x400 },
 	{ 0x4e300300, 0x16291314 },
 	{ 0x4e300304, 0x163110c },
 	{ 0x4e300308, 0xa200e3c },
 	{ 0x4e300170, 0x8b0b0608 },
-	{ 0x4e300124, 0x1c77071d },
-	{ 0x4e300f04, 0x80 },
+	{ 0x4e300124, 0x1c770000 },
+	{ 0x4e300800, 0x43930002 },
+	{ 0x4e300804, 0x1f1f1f1f },
 };
 
 /* PHY Initialize Configuration */
@@ -841,7 +843,7 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
 	{ 0x54004, 0x4 },
 	{ 0x54006, 0x15 },
 	{ 0x54008, 0x131f },
-	{ 0x54009, 0xff },
+	{ 0x54009, 0xc8 },
 	{ 0x5400b, 0x4 },
 	{ 0x5400c, 0x1 },
 	{ 0x5400d, 0x100 },
@@ -879,7 +881,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
 	{ 0x54004, 0x4 },
 	{ 0x54006, 0x15 },
 	{ 0x54008, 0x61 },
-	{ 0x54009, 0xff },
+	{ 0x54009, 0xc8 },
 	{ 0x5400b, 0x4 },
 	{ 0x5400c, 0x1 },
 	{ 0x5400d, 0x100 },
-- 
2.36.0