[PATCH v1 04/12] powerpc: dts: updates socrates board

Heiko Schocher hs at denx.de
Tue Jan 24 18:06:52 CET 2023


include common e500v2_power_isa.dtsi and rearrange
some nodes.

Signed-off-by: Heiko Schocher <hs at denx.de>
---

 arch/powerpc/dts/socrates.dts | 59 +++++++++++++++++++----------------
 1 file changed, 32 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/dts/socrates.dts b/arch/powerpc/dts/socrates.dts
index 452cf58b5e..ea75eb6af3 100644
--- a/arch/powerpc/dts/socrates.dts
+++ b/arch/powerpc/dts/socrates.dts
@@ -9,6 +9,8 @@
 
 /dts-v1/;
 
+/include/ "e500v2_power_isa.dtsi"
+
 / {
 	model = "abb,socrates";
 	compatible = "abb,socrates";
@@ -142,26 +144,29 @@
 			phy-handle = <&phy0>;
 			tbi-handle = <&tbi0>;
 			phy-connection-type = "rgmii-id";
+		};
 
-			mdio at 520 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,gianfar-mdio";
-				reg = <0x520 0x20>;
-
-				phy0: ethernet-phy at 0 {
-					interrupt-parent = <&mpic>;
-					interrupts = <0 1>;
-					reg = <0>;
-				};
-				phy1: ethernet-phy at 1 {
-					interrupt-parent = <&mpic>;
-					interrupts = <0 1>;
-					reg = <1>;
-				};
-				tbi0: tbi-phy at 11 {
-					reg = <0x11>;
-				};
+		mdio at 24520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "fsl,gianfar-mdio";
+			reg = <0x24520 0x20>;
+
+			phy0: ethernet-phy at 0 {
+				compatible = "ethernet-phy-ieee802.3-c22";
+				interrupt-parent = <&mpic>;
+				interrupts = <0 1>;
+				reg = <0>;
+			};
+
+			phy1: ethernet-phy at 1 {
+				compatible = "ethernet-phy-ieee802.3-c22";
+				interrupt-parent = <&mpic>;
+				interrupts = <0 1>;
+				reg = <1>;
+			};
+			tbi0: tbi-phy at 11 {
+				reg = <0x11>;
 			};
 		};
 
@@ -180,16 +185,16 @@
 			phy-handle = <&phy1>;
 			tbi-handle = <&tbi1>;
 			phy-connection-type = "rgmii-id";
+		};
 
-			mdio at 520 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,gianfar-tbi";
-				reg = <0x520 0x20>;
+		mdio at 26520 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "fsl,gianfar-tbi";
+			reg = <0x26520 0x20>;
 
-				tbi1: tbi-phy at 11 {
-					reg = <0x11>;
-				};
+			tbi1: tbi-phy at 11 {
+				reg = <0x11>;
 			};
 		};
 
-- 
2.37.3



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