[RFC PATCH 16/16] board: rockchip: Add Edgeble Neural Compute Module 6
Jagan Teki
jagan at edgeble.ai
Wed Jan 25 23:27:41 CET 2023
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
On module WiFi6/BT5 is available in the following Neu6 variants.
Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.
IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.
Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki <jagan at edgeble.ai>
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 23 +++++++
arch/arm/mach-rockchip/rk3588/Kconfig | 15 ++++
board/edgeble/neural-compute-module-6/Kconfig | 15 ++++
.../neural-compute-module-6/MAINTAINERS | 6 ++
.../edgeble/neural-compute-module-6/Makefile | 7 ++
board/edgeble/neural-compute-module-6/neu6.c | 4 ++
configs/neu6a-io-rk3588_defconfig | 68 +++++++++++++++++++
doc/board/rockchip/rockchip.rst | 2 +
include/configs/neural-compute-module-6.h | 15 ++++
9 files changed, 155 insertions(+)
create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
create mode 100644 board/edgeble/neural-compute-module-6/Kconfig
create mode 100644 board/edgeble/neural-compute-module-6/MAINTAINERS
create mode 100644 board/edgeble/neural-compute-module-6/Makefile
create mode 100644 board/edgeble/neural-compute-module-6/neu6.c
create mode 100644 configs/neu6a-io-rk3588_defconfig
create mode 100644 include/configs/neural-compute-module-6.h
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
new file mode 100644
index 0000000000..dc94ff9ef0
--- /dev/null
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = &sdmmc;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ u-boot,dm-spl;
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index e8c14e4187..def4094e2e 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -1,5 +1,18 @@
if ROCKCHIP_RK3588
+config TARGET_RK3588_NEU6
+ bool "Edgeble Neural Compute Module 6(Neu6) SoM"
+ select BOARD_LATE_INIT
+ help
+ Neu6:
+ Neural Compute Module 6A(Neu6a) is a 96boards SoM-CB compute module
+ based on Rockchip RK3588 from Edgeble AI.
+
+ Neu6-IO:
+ Neural Compute Module 6(Neu6) IO board is an industrial form factor
+ IO board and Neu6a needs to mount on top of this IO board in order to
+ create complete Edgeble Neural Compute Module 6(Neu6) IO platform.
+
config ROCKCHIP_BOOT_MODE_REG
default 0xfd588080
@@ -12,4 +25,6 @@ config SYS_SOC
config SYS_MALLOC_F_LEN
default 0x80000
+source board/edgeble/neural-compute-module-6/Kconfig
+
endif
diff --git a/board/edgeble/neural-compute-module-6/Kconfig b/board/edgeble/neural-compute-module-6/Kconfig
new file mode 100644
index 0000000000..c445454dde
--- /dev/null
+++ b/board/edgeble/neural-compute-module-6/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_RK3588_NEU6
+
+config SYS_BOARD
+ default "neural-compute-module-6"
+
+config SYS_VENDOR
+ default "edgeble"
+
+config SYS_CONFIG_NAME
+ default "neural-compute-module-6"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/edgeble/neural-compute-module-6/MAINTAINERS b/board/edgeble/neural-compute-module-6/MAINTAINERS
new file mode 100644
index 0000000000..249df957f1
--- /dev/null
+++ b/board/edgeble/neural-compute-module-6/MAINTAINERS
@@ -0,0 +1,6 @@
+RK3588-NEU6
+M: Jagan Teki <jagan at edgeble.ai>
+S: Maintained
+F: board/edgeble/neural-compute-module-6
+F: include/configs/neural-compute-module-6.h
+F: configs/neu6a-io-rk3588_defconfig
diff --git a/board/edgeble/neural-compute-module-6/Makefile b/board/edgeble/neural-compute-module-6/Makefile
new file mode 100644
index 0000000000..28310b1b34
--- /dev/null
+++ b/board/edgeble/neural-compute-module-6/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += neu6.o
diff --git a/board/edgeble/neural-compute-module-6/neu6.c b/board/edgeble/neural-compute-module-6/neu6.c
new file mode 100644
index 0000000000..3d2262ce97
--- /dev/null
+++ b/board/edgeble/neural-compute-module-6/neu6.c
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig
new file mode 100644
index 0000000000..c089f415d7
--- /dev/null
+++ b/configs/neu6a-io-rk3588_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_RK3588_NEU6=y
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6a-io.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0x400000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 28c837a382..a140c1a8a4 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -86,6 +86,8 @@ List of mainline supported Rockchip boards:
- Radxa ROCK Pi 4 (rock-pi-4-rk3399)
- Rockchip Evb-RK3399 (evb_rk3399)
- Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
+* rk3588
+ - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-r1126)
* rv1108
- Rockchip Evb-rv1108 (evb-rv1108)
- Elgin-R1 (elgin-rv1108)
diff --git a/include/configs/neural-compute-module-6.h b/include/configs/neural-compute-module-6.h
new file mode 100644
index 0000000000..52501b7ab8
--- /dev/null
+++ b/include/configs/neural-compute-module-6.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#ifndef __NEURAL_COMPUTE_MODULE_6_H
+#define __NEURAL_COMPUTE_MODULE_6_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __NEURAL_COMPUTE_MODULE_6_H */
--
2.25.1
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