[PATCH 0/8] SUNIV SPI NAND support in SPL

[Sam Edwards]

On 6/6/23 00:39, Icenowy Zheng wrote:
> Well it depends on whether all SoCs differienate between SPI NOR and
> SPI NAND.

Allwinner chips that (have datasheets saying they) support boot from 
SPI-NAND seem quite few and far between, but I've learned that the 
answer is "not all": the V3s, at least, appears to use 0x03 in the boot 
field when booting from SPI-NAND. (Note: I do not have a V3s that I 
tested with; I studied a dumped BROM.)

Still, I believe it's sensible that, when we know for sure we're coming 
from SPI-NAND (because it's a newer sunxi that reports 0x04, or we know 
from the suniv stack-checking hack), we should call that its own SPL 
load method, which does not fall back to SPI-NOR. The SPI(-NOR) load 
method naturally has to implement the try-NAND-first logic for some of 
these SoCs, but perhaps we could call it a "quirk" and only do that for 
chips that aren't known to report SPI-NAND directly?

> Do you have any suggestion on as many chips models as possible boards
> with SPI NAND?

I know of only one: the Turing Pi 2, which is the only target I'm trying 
to support. I'm guessing you're looking for some such boards so you can 
identify which of them report 0x03 and which report 0x04? I'd be happy 
to analyze some BROMs from chips known to support SPI-NAND boot if you 
know where I can find them.

Thanks,
Sam