[PATCH 1/3] xilinx: versal-net: Add mini qspi configuration
Ashok Reddy Soma
ashok.reddy.soma at amd.com
Wed Jun 14 14:13:49 CEST 2023
Add support for Versal NET mini Quad SPI flash configuration. This runs
from onchip memory, so it has to be compact. Hence only Quad SPI
related settings are enabled.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at amd.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/versal-net-mini-qspi-single.dts | 16 ++++
arch/arm/dts/versal-net-mini-qspi.dtsi | 72 ++++++++++++++++++
configs/xilinx_versal_net_mini_qspi_defconfig | 75 +++++++++++++++++++
4 files changed, 164 insertions(+)
create mode 100644 arch/arm/dts/versal-net-mini-qspi-single.dts
create mode 100644 arch/arm/dts/versal-net-mini-qspi.dtsi
create mode 100644 configs/xilinx_versal_net_mini_qspi_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa60..7b2fd0653b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -413,6 +413,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
xilinx-versal-virt.dtb
dtb-$(CONFIG_ARCH_VERSAL_NET) += \
versal-net-mini.dtb \
+ versal-net-mini-qspi-single.dtb \
xilinx-versal-net-virt.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
zynqmp-r5.dtb
diff --git a/arch/arm/dts/versal-net-mini-qspi-single.dts b/arch/arm/dts/versal-net-mini-qspi-single.dts
new file mode 100644
index 0000000000..fec1b514ed
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-single.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+ model = "Xilinx Versal NET MINI QSPI SINGLE";
+};
+
+&flash0 {
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/versal-net-mini-qspi.dtsi b/arch/arm/dts/versal-net-mini-qspi.dtsi
new file mode 100644
index 0000000000..2c91dcccc8
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi.dtsi
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal NET Mini QSPI Configuration
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek at amd.com>
+ * Ashok Reddy Soma <ashok.reddy.soma at amd.com>
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "xlnx,versal-net-mini";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Xilinx Versal NET MINI QSPI";
+
+ aliases {
+ serial0 = &dcc;
+ spi0 = &qspi;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200";
+ };
+
+ memory at bbf00000 {
+ device_type = "memory";
+ reg = <0 0xbbf00000 0 0x100000>;
+ };
+
+ clk150: clk150 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <150000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ qspi: spi at f1030000 {
+ compatible = "xlnx,versal-qspi-1.0";
+ status = "okay";
+ clock-names = "ref_clk", "pclk";
+ num-cs = <1>;
+ reg = <0 0xf1030000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk150>, <&clk150>;
+
+ flash0: flash at 0 {
+ compatible = "n25q512a", "micron,m25p80",
+ "jedec,spi-nor";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <20000000>;
+ };
+ };
+ };
+};
diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig
new file mode 100644
index 0000000000..a7ebc38cda
--- /dev/null
+++ b/configs/xilinx_versal_net_mini_qspi_defconfig
@@ -0,0 +1,75 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_versal_net_mini"
+CONFIG_COUNTER_FREQUENCY=100000000
+CONFIG_ARCH_VERSAL_NET=y
+CONFIG_TEXT_BASE=0xBBF00000
+CONFIG_SYS_MALLOC_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000
+CONFIG_SF_DEFAULT_SPEED=30000000
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-qspi-single"
+CONFIG_SYS_PROMPT="Versal NET> "
+CONFIG_SYS_MEM_RSVD_FOR_MMU=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0xBBF80000
+# CONFIG_EXPERT is not set
+CONFIG_REMAKE_ELF=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+# CONFIG_AUTOBOOT is not set
+CONFIG_LOGLEVEL=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+# CONFIG_SYS_XTRACE is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_NET is not set
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
+# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_POWER is not set
+CONFIG_ARM_DCC=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+# CONFIG_LMB is not set
--
2.17.1
More information about the U-Boot
mailing list