[RFC PATCH 00/17] sunxi: rework pinctrl and add T113s support

[Andre Przywara]

On Sun, 18 Jun 2023 13:01:33 -0600
Sam Edwards <cfsworks at gmail.com> wrote:

Hi Sam,

thanks for the reply, that's very helpful.

> On 6/14/23 18:07, Andre Przywara wrote:
> > So I finally found some time to address some issues in the series,
> > especially in the first patches (pinctrl rework and preparation).
> > I pushed a branch to https://github.com/apritzel/u-boot/commits/r528-rc
> > I need to do more testing, most importantly regression testing on other
> > SoCs, and will only be able to post something next week, I guess.
> > 
> > If you could briefly list the things that are still missing, I could
> > try to pick some low hanging fruits.  
> 
> Rebasing onto this branch ended up eliminating a good chunk of my local 
> hack commits. I've verified that everything is still working (but have 
> not yet retested NAND SPL).

Great, thanks!

> The remaining local changes I have are two additions to cpu_sunxi_ncat2.h:
> +#define SUNXI_R_CPUCFG_BASE		0x07000400 /* for PSCI */
> +#define SUNXI_RTC_BASE			0x07090000 /* for FEL */

Right, I will definitely take the PSCI bit, but not so sure about FEL yet.

> The former can probably be brought into my PSCI series somehow (unless 
> we expect more chips with CPUX blocks which might move those soft entry 
> registers around, then it should be defined in cpu_sunxi_*.h). The 
> latter is to support a reimplementation of Allwinner's `efex` command 
> that I'm using for development (it pokes the magic number 0x5AA5A55A 
> into RTC's GP_DATA_REG[2] and then resets; SPL clears that magic number 
> and then does an early branch to BROM+0x0020 -- exactly what Allwinner's 
> fork does).

So yeah, the request of a "Enter FEL" command came up multiple times, but
so far no one could be bothered to implement this properly. The idea would
be to have a generic command (more like "fel-reset" than efex), and
allow each SoC (family) to implement this differently, as every
SoC requires something a bit different here (32-bit vs. 64-bit, having an
RTC vs not, etc).

If you could post your solution somewhere, we could start this effort.
There was some patch for the H3 already, and it's relatively
straight-forward on the newer SoCs (H616, IIRC), so if at least two
popular, but different SoCs would be supported, we could make sure to have
the right abstractions in place.

> I've also noticed exactly(!) one formatting difference in our clk_d1.c:
> -	.num_gates = ARRAY_SIZE(d1_gates),
> +	.num_gates  = ARRAY_SIZE(d1_gates),
> 
> Up to you if you prefer to align the = or not, but it does look 
> inconsistent when .gates and .resets are aligned and .num_* aren't - 
> might be a nitpick that comes up in patch review.

Well, this is how it is in all the other clock drivers, so I chose to stay
consistent with them ;-)

> > Interesting, indeed this is left at 0, which I think will result in 288
> > MHz.  
> 
> Correct, at least that's what I was seeing.
> 
> > What is that frequency in your case? Do you know what the BSP
> > programs?  
> 
> 1008 MHz, both.
> 
> > Traditionally we used something conservative that works
> > without cooling and with the default voltage, but I don't know that
> > value for the T113s.  
> 
> For what it's worth, this board has a bare T113-s3 and the current OS 
> does not reclock from 1008 MHz at all, and I don't know of any users of 
> the board having stability issues.
> 
> In my own case, it idles at that clock at around ~35°C.

OK, many thanks, it looks like 1008 MHz it is, then.

> > I think CLK_SUN20I_D1 should be set by default now, so can you check
> > that this is fixed?  
> 
> It is now gone from my defconfig and still working, so indeed this is fixed.
> 
> > Why would we need H6 PSCI support? On the ARMv8 parts we use Trusted
> > Firmware-A (TF-A) to provide PSCI services, which has a much more mature
> > implementation.  
> 
> It's not about the H6 and more about me being unsure whether R528/T113 
> is the first ARMv7-based SoC to use the new CPU management registers. If 
> it's not, and there's another such chip supported in U-Boot that just 
> lacks PSCI, it would make more sense for me to land my PSCI series 
> independently of our work here, and then you can add the R528 case 
> later. It sounds like R528/T113 may be the first such chip needing this 
> new code, though, so this may have to wait until the R528 series lands.
> 
> > How would this conflict, exactly? I don't see any other I2C2
> > definition?  
> 
> Well, no, the other definitions haven't landed in U-Boot yet. But they 
> do exist in the kernel, datasheets, and physical chips themselves:
> 
> PB0/PB1/PB8/PB9/PE4/PE5: i2c2 defined as muxval 4
> PC0/PC1/PD20/PD21/PG6/PG7/PG14/PG15: i2c2 defined as muxval 3
> PE12/PE13: i2c2 defined as muxval 2
> 
> Defining i2c2=2 universally would mean that the pins for i2c2 cannot be 
> changed, since it would conflict with every other definition.

Well, we are well aware that the current pinmux code is limited, but
we figured it does work for all practical purposes, and U-Boot has a far
tighter scope than Linux, so we don't need to support every theoretically
possible use case.
So if the TuringPi 2 board would be upstream, and you need I2C2, you would
just set the precedence for muxval 2. It's then the next board's problem
to live with that. Either by adding the port number (PB/PC/PD/PG) to the
definitions, or by reverting to a DT solution:
https://lore.kernel.org/linux-sunxi/20221110014255.20711-1-andre.przywara@arm.com/

> > And what do you need I2C2 for, exactly?  
> 
> Pins PE12/PE13 host an I²C bus with the board ID EEPROM and an Ethernet 
> switch that should be reset (and have a few registers set to configure 
> proper port isolation) very shortly after power-on.
> 
> > Well, there are shortcuts. I sketched some simpler idea in the comment
> > at the top of pinctrl-sunxi.c.  
> 
> My shortcut for the time being will probably be, "downstream patch."

see below ;-)

> >> At this time I have no interest in upstreaming the DT.  
> > 
> > Why not?
> >   
> >> That might change
> >> in the future, but for now it's very much meant to be out-of-tree.  
> > 
> > Why is this? This only increases your update burden, and we might break
> > something and not realise that, if your DT is not in the tree.
> > The question to ask should be rather: why *not* to upstream the DT?
> > Please keep in mind that this would block U-Boot support, since we need
> > the DT approved in the kernel before we could merge it into U-Boot.  
> 
> Currently, downstream is still fairly dependent on the Tina Linux 
> kernel, not mainline. This is a situation I'd like to change, but it's a 
> push for another day -- my focus right now is only on improving the 
> bootloader situation.

Ah, depending on the BSP kernel is indeed quite bad. I wonder what
features of the kernel you rely on that upstream does not have? Or is it
more about the BMC userland parts that are married to the Allwinner kernel
and its own interfaces?

> This means that there are actually two DTs: one for the kernel, using 
> the Tina Linux binding values, and one for U-Boot's control FDT, which 
> can only support U-Boot right now (and cannot yet be tested on a real 
> kernel). So neither DT is acceptable upstream: the former uses 
> incompatible values/includes, and the latter isn't meant for Linux.

So as you probably know, conceptually there is only one DT per machine, as
the DT describes the hardware. That's why try hard to align U-Boot and
Linux at least, and IIUC the BSDs copied the version in the Linux kernel
tree as well. Allwinner seems to have little clue or interest here, and we
gave up on their (quite misguided) interpretation of the DT a long time
ago.

> Even after(/if) this situation is resolved, the unified DT will probably 
> remain in a state of flux for a while, until some drivers can be updated 
> upstream (there's a slight mess with the I²C driver that needs to be 
> cleaned up and we have to use GPIO-bitbanged I²C until then, for 
> example) so it'll take more work before we have a "final" DT. At *that* 
> time, upstreaming would be a good idea...

Final DT is a noble goal, but in reality there will always be room for
improvement and additions. So what we typically do is to start with a
simple .dts for the kernel tree, describing the basic peripherals, and
everything that already works and is not subject to debate. If in doubt,
include a node, and we will comment. Could you prepare such a patch? This
should not contradict any DT nodes that U-Boot uses, so it's not a double
effort.
This would mean we have a *second* board DT for the T113s SoC in the
kernel, which always helps to improve quality and prevents hacks that just
work on the MangoPi. Besides, the TuringPi board is an actually useful
application of the SoC, deployed and available, in contrast to just some
development board from Chinese websites.
And once this is merged, we could just copy this over to U-Boot and add
the defconfig and any other support patches there.

> ...but for now it's very much meant to be out-of-tree. :)
> 
> (I also do not work for the company that produced this board -- I'm just 

Ah, that would have been a first anyway ;-)

> a contributor to the firmware project. Whether the project would even 
> use the mainline version of its DT in the first place is, though likely, 
> ultimately not my call.)

Yeah, I understand it's not the most grateful job to chase up on doing
things properly and stay on with the upstreaming process. Ultimately it's
the right thing to do, though, and will save you hassle over time. Plus we
(the community) will help you with that, and you'd get a second commit in
the kernel ;-)

Cheers,
Andre