[PATCH 02/10] usb: dwc3: core: improve reset sequence

Eugen Hristev eugen.hristev at collabora.com
Thu Jun 22 12:00:42 CEST 2023


On 6/22/23 12:58, Eugen Hristev wrote:
> From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> 
> [ Felipe: Ported from Linux kernel commit
> 	  f59dcab17629 ("usb: dwc3: core: improve reset sequence") ]
> 
> According to Synopsys Databook, we shouldn't be relying on
> GCTL.CORESOFTRESET bit as that's only for debugging purposes.
> Instead, let's use DCTL.CSFTRST if we're OTG or PERIPHERAL mode.
> 
> Host side block will be reset by XHCI driver if necessary. Note that this
> reduces amount of time spent on dwc3_probe() by a long margin.
> 
> We're still gonna wait for reset to finish for a long time
> (default to 1ms max), but tests show that the reset polling loop executed
> at most 19 times (modprobe dwc3 && modprobe -r dwc3 executed 1000
> times in a row).
> 
> Without proper core reset, observing random issues like when the
> USB(DWC3) is in device mode, the host device is not able to detect the
> USB device.
> 
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> [eugen.hristev at collabora.com: keep the PHY resets code]
> Signed-off-by: Eugen Hristev <eugen.hristev at collabora.com>
> ---
> 
> Just resending for consistency with my series. I readded the PHY resets
> code because it breaks my PHYs if it's being removed
> 
> Marek, I know you NAKed this, that's fine, I am simply adding this patch
> (and the others here) for consistency

 >>>
 >>> Please sync the DWC3 patchset with Linux first, else this is a NAK.
 >>>
 >>> Please do not make the DWC3 driver an unmaintainable mess.
 >>>
 >>> I already explained this to AMD/Xilinx, multiple times, they 
ignored all my requests without even trying, so my NAK still stands.
 >>>
 >>> The sync should be easy and mechanical.
 >>>
 >>> Please do not try to sneak those patches in as part of another series.
 >>
 >> Hi Marek,
 >>
 >> I know, I saw the discussion. I am adding the patch in case someone 
wants to use it. Definitely I am not trying to sneak anything. Read the 
cover letter as well if you have doubts.
 >
 > I tried asking intel just now to fix what AMD couldn't, so let's see.

I will try to do it myself, if I have some spare time in the following 
months, if nobody does it.

^^
I am resending the conversation above as I forgot to CC the mailing list 
on the initial thread


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