[PATCH v1] cache_v8: agilex5: Disable Dcache in the SPL

[Lim, Jit Loon]

> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: Wednesday, 21 June, 2023 10:20 PM
> To: Marc Zyngier <maz at kernel.org>; Lim, Jit Loon <jit.loon.lim at intel.com>
> Cc: u-boot at lists.denx.de; Jagan Teki <jagan at amarulasolutions.com>; Simon
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at intel.com>; Hea, Kok Kiang <kok.kiang.hea at intel.com>;
> Lokanathan, Raaj <raaj.lokanathan at intel.com>; Maniyam, Dinesh
> <dinesh.maniyam at intel.com>; Ng, Boon Khai <boon.khai.ng at intel.com>;
> Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at intel.com>; Chong, Teik Heng
> <teik.heng.chong at intel.com>; Zamri, Muhammad Hazim Izzat
> <muhammad.hazim.izzat.zamri at intel.com>; Tang, Sieu Mun
> <sieu.mun.tang at intel.com>; Ying-Chun Liu <paul.liu at linaro.org>; Lee, Kah
> Jing <kah.jing.lee at intel.com>
> Subject: Re: [PATCH v1] cache_v8: agilex5: Disable Dcache in the SPL
> 
> On 6/21/23 16:15, Marc Zyngier wrote:
> > On Wed, 21 Jun 2023 15:06:51 +0100,
> > Jit Loon Lim <jit.loon.lim at intel.com> wrote:
> >>
> >> From: Kah Jing Lee <kah.jing.lee at intel.com>
> >>
> >> Dcache feature is not enabled in SPL and enable it will cause ISR
> >> exception. Since the Dcache is not supported in SPL, new
> >> CONFIG_SPL_SYS_DISABLE_DCACHE_OPS is added to Kconfig to disable
> >> Dcache in SPL.
> >>
> >> Signed-off-by: Kah Jing Lee <kah.jing.lee at intel.com>
> >
> > This is missing your own SoB.
> >
> > Now, I'd like to understand what you are actually trying to fix. What
> > is this 'ISR' exception? This isn't something the architecture
> > describes. Unless you are using CMOs on something that isn't memory or
> > for which you don't have a mapping, this should never generate an
> > exception.
> 
> You beat me to it, indeed, thanks !

The intention of doing this is because when we init SDMMC driver, the driver will call the invalidate_dcache_range. 
However, during that time, the dcache is not available in SPL yet thus causing exception. 
https://elixir.bootlin.com/u-boot/latest/source/drivers/mmc/sdhci.c#L181 -> https://elixir.bootlin.com/u-boot/latest/source/include/linux/dma-mapping.h#L55 -> https://elixir.bootlin.com/u-boot/latest/source/arch/arm/cpu/armv8/cache_v8.c#L475