[PATCH v5 13/21] spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr
Simon Glass
sjg at chromium.org
Wed Mar 1 16:01:48 CET 2023
Hi Johan,
On Tue, 28 Feb 2023 at 14:20, Johan Jonker <jbx6244 at gmail.com> wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expect 64-bit data from the device tree parser,
Do you mean that 32-bit machines now use 64-bit values regardless?
That does not sound very efficient.
> so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
> function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able
> to handle both sizes.
>
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
> Reviewed-by: Michael Trimarchi <michael at amarulasolutions.com>
> ---
> drivers/spi/spi-aspeed-smc.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> index 4b6ea9f8..2be9280a 100644
> --- a/drivers/spi/spi-aspeed-smc.c
> +++ b/drivers/spi/spi-aspeed-smc.c
> @@ -1125,15 +1125,14 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> int ret;
> struct clk hclk;
>
> - priv->regs = (void __iomem *)devfdt_get_addr_index(bus, 0);
> - if ((u32)priv->regs == FDT_ADDR_T_NONE) {
> + priv->regs = devfdt_get_addr_index_ptr(bus, 0);
> + if (!priv->regs) {
> dev_err(bus, "wrong ctrl base\n");
> return -ENODEV;
-EINVAL (since there is a device and this is used internally by driver model)
> }
>
> - plat->ahb_base =
> - (void __iomem *)devfdt_get_addr_size_index(bus, 1, &plat->ahb_sz);
> - if ((u32)plat->ahb_base == FDT_ADDR_T_NONE) {
> + plat->ahb_base = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahb_sz);
> + if (!plat->ahb_base) {
> dev_err(bus, "wrong AHB base\n");
> return -ENODEV;
> }
> @@ -1151,8 +1150,8 @@ static int apseed_spi_of_to_plat(struct udevice *bus)
> plat->hclk_rate = clk_get_rate(&hclk);
> clk_free(&hclk);
>
> - dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%lx\n",
> - (u32)priv->regs, plat->ahb_base, plat->ahb_sz);
> + dev_dbg(bus, "ctrl_base = 0x%x, ahb_base = 0x%p, size = 0x%llx\n",
> + (u32)priv->regs, plat->ahb_base, (fdt64_t)plat->ahb_sz);
> dev_dbg(bus, "hclk = %dMHz, max_cs = %d\n",
> plat->hclk_rate / 1000000, plat->max_cs);
>
> --
> 2.20.1
>
Regards,
Simon
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