[PATCH v2 1/8] rockchip: Drop bootstage stash in TPL and SPL for rockpro64

Simon Glass sjg at chromium.org
Thu Mar 2 04:39:22 CET 2023


Unfortunately the IRAM used to stash the bootstage records in TPL
becomes inaccessible after SPL runs. Presumably this is because of ATF
taking it over.

We could move the stash to another address in SPL, before passing it to
U-Boot proper. But it seems easier to wait until we have support for
standard passage[1] which should not be too far away.

For now, disable it in TPL and SPL.

[1] https://patchwork.ozlabs.org/project/uboot/cover/
    20220117150428.1580273-1-sjg at chromium.org/

Signed-off-by: Simon Glass <sjg at chromium.org>
Tested-by: Vagrant Cascadian <vagrant at debian.org>
---

Changes in v2:
- Fix 'accessible' typo

 configs/rockpro64-rk3399_defconfig | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index dd67f9dff64..49614236819 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_TARGET_ROCKPRO64_RK3399=y
 CONFIG_SPL_STACK=0x400000
-CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e0000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -21,11 +20,7 @@ CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTSTAGE=y
-CONFIG_SPL_BOOTSTAGE=y
-CONFIG_TPL_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
-CONFIG_BOOTSTAGE_STASH=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-- 
2.40.0.rc0.216.gc4246ad0f0-goog



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