[PATCH v4 3/4] Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region

[Tom Rini]

On Mon, Mar 06, 2023 at 11:12:53AM +0530, Manorit Chawdhry wrote:
> In non-combined boot flow for K3, all the firewalls are locked by default
> until sysfw comes up. Rom configures some of the firewall for its usage
> along with the SRAM for R5 but the PSRAM region is still locked.
> 
> The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
> firewall exception before sysfw came up. The exception started happening
> after adding multi dtb support that accesses the scratchpad for reading
> EEPROM contents.
> 
> The commit changes R5 MCU scratchpad for j721e to an SRAM region.
> 
> Old Map:
> ┌─────────────────────────────────────┐ 0x41c00000
> │                 SPL                 │
> ├─────────────────────────────────────┤ 0x41c40000 (approx)
> │                STACK                │
> ├─────────────────────────────────────┤ 0x41c85b20
> │             Global data             │
> │  sizeof(struct global_data) = 0xd8  │
> ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc
> │                HEAP                 │
> │  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
> ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
> │               SPL BSS               │ (0x41cf5bfc)
> │  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
> └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
> 			                (0x41cffbfc)
> 
> New Map:
> ┌─────────────────────────────────────┐ 0x41c00000
> │                 SPL                 │
> ├─────────────────────────────────────┤ 0x41c40000 (approx)
> │                EMPTY                │
> ├─────────────────────────────────────┤ 0x41c81920
> │                STACK                │
> │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │
> ├─────────────────────────────────────┤ 0x41c85920
> │             Global data             │
> │  sizeof(struct global_data) = 0xd8  │
> ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0
> │                HEAP                 │
> │  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
> ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
> │               SPL BSS               │ (0x41cf59f0)
> │  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
> ├─────────────────────────────────────┤ 0x41cff9fc
> │         NEW MCU SCRATCHPAD          │
> │  SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
> └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
> 			                (0x41cffbfc)
> 
> Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")
> 
> Signed-off-by: Manorit Chawdhry <m-chawdhry at ti.com>
> [n-francis at ti.com: SRAM allocation addressing diagram]
> Signed-off-by: Neha Francis <n-francis at ti.com>
> Reviewed-by: Tom Rini <trini at konsulko.com>
> Reviewed-by: Kamlesh Gurudasani <kamlesh at ti.com>
> ---
>  arch/arm/mach-k3/Kconfig       |  3 ++-
>  configs/j721e_evm_r5_defconfig | 10 ++++++++--
>  doc/board/ti/j721e_evm.rst     | 27 +++++++++++++++++++++++++++

OK, but now this just renders differently poorly.  Please see the
list-table directive as used for example in doc/board/apple/m1.rst and
it would be good to get other ascii tables updated to produce nice
output as well.

-- 
Tom
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