[PATCH v4 00/17] Basic StarFive JH7110 RISC-V SoC support
Yanhong Wang
yanhong.wang at starfivetech.com
Thu Mar 16 03:53:15 CET 2023
This series of patches base on the latest branch/master, and add support
for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for
this to be achieved, the respective DT nodes have been added, and the
required defconfigs have been added to the boards' defconfig. What is more,
the basic required DM drivers have been added, such as reset, clock, pinctrl,
uart, ram etc.
Note that the register base address of reset controller is same with the
clock controller. Therefore, there is no device tree node alone for reset
driver. It binds device node in the clock driver.
The u-boot-spl and u-boot has been tested on the StarFive VisionFive 2 1.2A
and 1.3B boards which equip with JH7110 SoC and works normally.
For more information and support, you can visit RVspace wiki[1].
[1] https://wiki.rvspace.org/
v4:
- Replace compatible string "starfive,jh7110-ccache" with "sifive,ccache0".
- Added 'gmac0_tx_inv','gmac1_tx_inv','gmac1_rx' clock registration.
- Added enable_caches() call to enable L2 cache in board_init() function.
- Moved 'S7_0' device node from board dts to SoC -u-boot.dtsi.
- Added 'i2cx' device node to board dts to consistent with linux.
- Renamed device node 'sdcard1_pins' to 'mmc1_pins'.
v3:
- Added doc/board/starfive/visionfive2.rst file.
- Added support booting from SD.
- Added support pinctrl in SPL.
- Reworded dts to consistent with linux.
- Added CFG_EXTRA_ENV_SETTINGS configuration.
- Reworded starfive_visionfive2_defconfig.
- Reworded the clock driver.
- Renamed 'starfive-jh7110.h' to 'starfive,jh7110-crg.h'.
- Separated 'starfive_visionfive2.dts' to 'jh7110-starfive-visionfive-2-v1.3b.dts'
and 'jh7110-starfive-visionfive-2-v1.2a.dts' to consistent with linux.
- Added pinmux_property_set callback function implementation in 'pinctrl-starfive.c'.
v2:
- Renamed file 'jh7110-regs.h' to 'regs.h'.
- Reworded the clear L2 LIM memory code in C.
- Removed flash init call in 'spl_soc_init' function.
- Reworded the clock driver.
- Rename the macro 'SET_DIV' to 'ASSIGNED_CLOCK_PARENTS' in 'spl.c'.
- Moved the device tree node 'dmc at 15700000' from 'jh7110-u-boot.dtsi' to
'starfive_visionfive2-u-boot.dtsi'
Previous versions:
v1 - https://patchwork.ozlabs.org/project/uboot/cover/20221212025020.23778-1-yanhong.wang@starfivetech.com/
v2 - https://patchwork.ozlabs.org/project/uboot/cover/20230118081132.31403-1-yanhong.wang@starfivetech.com/
v3 - https://patchwork.ozlabs.org/project/uboot/patch/20230303032432.7837-2-yanhong.wang@starfivetech.com/
Jianlong Huang (1):
dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Kuan Lim Lee (1):
pinctrl: starfive: Add StarFive JH7110 driver
Yanhong Wang (15):
riscv: cpu: jh7110: Add support for jh7110 SoC
cache: starfive: Add StarFive JH7110 support
dt-bindings: reset: Add StarFive JH7110 reset definitions
reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC
dt-bindings: clock: Add StarFive JH7110 clock definitions
clk: starfive: Add StarFive JH7110 clock driver
ram: starfive: add ddr driver
board: starfive: add StarFive VisionFive v2 board support
riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC
board: starfive: Add Kconfig for StarFive VisionFive v2 Board
board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig
riscv: dts: jh7110: Add initial StarFive JH7110 device tree
riscv: dts: jh7110: Add initial u-boot device tree
riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device
tree
configs: starfive: add starfive_visionfive2_defconfig
arch/riscv/Kconfig | 5 +
arch/riscv/cpu/jh7110/Kconfig | 28 +
arch/riscv/cpu/jh7110/Makefile | 10 +
arch/riscv/cpu/jh7110/cpu.c | 23 +
arch/riscv/cpu/jh7110/dram.c | 38 +
arch/riscv/cpu/jh7110/spl.c | 64 +
arch/riscv/dts/Makefile | 3 +-
...10-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69 +
.../jh7110-starfive-visionfive-2-v1.2a.dts | 12 +
...10-starfive-visionfive-2-v1.3b-u-boot.dtsi | 69 +
.../jh7110-starfive-visionfive-2-v1.3b.dts | 12 +
.../dts/jh7110-starfive-visionfive-2.dtsi | 319 +++
arch/riscv/dts/jh7110-u-boot.dtsi | 99 +
arch/riscv/dts/jh7110.dtsi | 582 +++++
arch/riscv/include/asm/arch-jh7110/regs.h | 19 +
arch/riscv/include/asm/arch-jh7110/spl.h | 12 +
board/starfive/visionfive2/Kconfig | 53 +
board/starfive/visionfive2/MAINTAINERS | 7 +
board/starfive/visionfive2/Makefile | 7 +
board/starfive/visionfive2/spl.c | 87 +
.../visionfive2/starfive_visionfive2.c | 40 +
configs/starfive_visionfive2_defconfig | 79 +
doc/board/starfive/index.rst | 9 +
doc/board/starfive/visionfive2.rst | 492 +++++
drivers/cache/cache-sifive-ccache.c | 1 +
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/starfive/Kconfig | 17 +
drivers/clk/starfive/Makefile | 4 +
drivers/clk/starfive/clk-jh7110-pll.c | 321 +++
drivers/clk/starfive/clk-jh7110.c | 603 +++++
drivers/clk/starfive/clk.h | 57 +
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/starfive/Kconfig | 28 +
drivers/pinctrl/starfive/Makefile | 6 +
drivers/pinctrl/starfive/pinctrl-jh7110-aon.c | 113 +
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 399 ++++
drivers/pinctrl/starfive/pinctrl-starfive.c | 382 ++++
drivers/pinctrl/starfive/pinctrl-starfive.h | 55 +
drivers/ram/Kconfig | 1 +
drivers/ram/Makefile | 4 +-
drivers/ram/starfive/Kconfig | 5 +
drivers/ram/starfive/Makefile | 11 +
drivers/ram/starfive/ddrcsr_boot.c | 339 +++
drivers/ram/starfive/ddrphy_start.c | 279 +++
drivers/ram/starfive/ddrphy_train.c | 383 ++++
drivers/ram/starfive/ddrphy_utils.c | 1955 +++++++++++++++++
drivers/ram/starfive/starfive_ddr.c | 161 ++
drivers/ram/starfive/starfive_ddr.h | 65 +
drivers/reset/Kconfig | 16 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-jh7110.c | 158 ++
include/configs/starfive-visionfive2.h | 49 +
.../dt-bindings/clock/starfive,jh7110-crg.h | 257 +++
.../pinctrl/pinctrl-starfive-jh7110.h | 427 ++++
.../dt-bindings/reset/starfive,jh7110-crg.h | 183 ++
57 files changed, 8420 insertions(+), 2 deletions(-)
create mode 100644 arch/riscv/cpu/jh7110/Kconfig
create mode 100644 arch/riscv/cpu/jh7110/Makefile
create mode 100644 arch/riscv/cpu/jh7110/cpu.c
create mode 100644 arch/riscv/cpu/jh7110/dram.c
create mode 100644 arch/riscv/cpu/jh7110/spl.c
create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi
create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts
create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi
create mode 100644 arch/riscv/dts/jh7110.dtsi
create mode 100644 arch/riscv/include/asm/arch-jh7110/regs.h
create mode 100644 arch/riscv/include/asm/arch-jh7110/spl.h
create mode 100644 board/starfive/visionfive2/Kconfig
create mode 100644 board/starfive/visionfive2/MAINTAINERS
create mode 100644 board/starfive/visionfive2/Makefile
create mode 100644 board/starfive/visionfive2/spl.c
create mode 100644 board/starfive/visionfive2/starfive_visionfive2.c
create mode 100644 configs/starfive_visionfive2_defconfig
create mode 100644 doc/board/starfive/index.rst
create mode 100644 doc/board/starfive/visionfive2.rst
create mode 100644 drivers/clk/starfive/Kconfig
create mode 100644 drivers/clk/starfive/Makefile
create mode 100644 drivers/clk/starfive/clk-jh7110-pll.c
create mode 100644 drivers/clk/starfive/clk-jh7110.c
create mode 100644 drivers/clk/starfive/clk.h
create mode 100644 drivers/pinctrl/starfive/Kconfig
create mode 100644 drivers/pinctrl/starfive/Makefile
create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-aon.c
create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c
create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c
create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h
create mode 100644 drivers/ram/starfive/Kconfig
create mode 100644 drivers/ram/starfive/Makefile
create mode 100644 drivers/ram/starfive/ddrcsr_boot.c
create mode 100644 drivers/ram/starfive/ddrphy_start.c
create mode 100644 drivers/ram/starfive/ddrphy_train.c
create mode 100644 drivers/ram/starfive/ddrphy_utils.c
create mode 100644 drivers/ram/starfive/starfive_ddr.c
create mode 100644 drivers/ram/starfive/starfive_ddr.h
create mode 100644 drivers/reset/reset-jh7110.c
create mode 100644 include/configs/starfive-visionfive2.h
create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h
create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h
create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h
base-commit: 88e08fc5f6e508eac46cd1dfb0379b11ae032c0a
--
2.17.1
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