[PATCH RFC u-boot-mvebu 0/2] arm: mvebu: Fix eMMC boot

[Pali Rohár]

On Sunday 19 March 2023 00:32:01 Martin Rowe wrote:
> On Mon, 6 Mar 2023 at 11:53, Pali Rohár <pali at kernel.org> wrote:
> 
> > Could you try to print mmc->part_config (ideally as early as possible)?
> >
> 
> In SPL mmc->part_config is 255
> In main u-boot at the start of clearfog.c board_init() mmc->part_config is
> 255
> In main u-boot at the start of clearfog.c checkboard() mmc->part_config is
> 8 (ack: 0, partition_enable: 1, access: 0)

255 is uninitialized value.

> If I set partition_enable to 2, I get the same result except the value is
> 16  (ack: 0, partition_enable: 2, access: 0) instead of 8 for the last value

Try to change "access" bits.

> <partition_enable 1>
> BootROM - 1.73
> 
> Booting from MMC
> 
> U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - 10:05:32
> +1000)
> High speed PHY - Version: 2.0
> EEPROM TLV detection failed: Using static config for Clearfog Pro.
> Detected Device ID 6828
> board SerDes lanes topology details:
>  | Lane # | Speed |  Type       |
>  --------------------------------
>  |   0    |   3   | SATA0       |
>  |   1    |   0   | SGMII1      |
>  |   2    |   5   | PCIe1       |
>  |   3    |   5   | USB3 HOST1  |
>  |   4    |   5   | PCIe2       |
>  |   5    |   0   | SGMII2      |
>  --------------------------------
> High speed PHY - Ended Successfully
> mv_ddr: 14.0.0
> DDR3 Training Sequence - Switching XBAR Window to FastPath Window
> mv_ddr: completed successfully
> spl.c spl_boot_device part_config = 255
> Trying to boot from MMC1
> 
> 
> U-Boot 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - 10:05:32 +1000)
> 
> SoC:   MV88F6828-A0 at 1600 MHz
> DRAM:  1 GiB (800 MHz, 32-bit, ECC not enabled)
> clearfog.c board_init part_config = 255
> Core:  38 devices, 22 uclasses, devicetree: separate
> MMC:   mv_sdh: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
> 
> Model: SolidRun Clearfog A1
> clearfog.c checkboard part_config = 8
> Board: SolidRun Clearfog Pro
> Net:
> Warning: ethernet at 70000 (eth1) using random MAC address - 32:16:0e:b4:d1:d8
> eth1: ethernet at 70000
> Warning: ethernet at 30000 (eth2) using random MAC address - 72:30:3f:79:07:12
> , eth2: ethernet at 30000
> Warning: ethernet at 34000 (eth3) using random MAC address - 82:fb:71:23:46:4f
> , eth3: ethernet at 34000
> Hit any key to stop autoboot:  0
> => mmc partconf 0
> EXT_CSD[179], PARTITION_CONFIG:
> BOOT_ACK: 0x0
> BOOT_PARTITION_ENABLE: 0x1
> PARTITION_ACCESS: 0x0
> </partition_enable 1>
> 
> <partition_enable 2>
> BootROM - 1.73
> 
> Booting from MMC
> 
> U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - 10:05:32
> +1000)
> High speed PHY - Version: 2.0
> EEPROM TLV detection failed: Using static config for Clearfog Pro.
> Detected Device ID 6828
> board SerDes lanes topology details:
>  | Lane # | Speed |  Type       |
>  --------------------------------
>  |   0    |   3   | SATA0       |
>  |   1    |   0   | SGMII1      |
>  |   2    |   5   | PCIe1       |
>  |   3    |   5   | USB3 HOST1  |
>  |   4    |   5   | PCIe2       |
>  |   5    |   0   | SGMII2      |
>  --------------------------------
> High speed PHY - Ended Successfully
> mv_ddr: 14.0.0
> DDR3 Training Sequence - Switching XBAR Window to FastPath Window
> mv_ddr: completed successfully
> spl.c spl_boot_device part_config = 255
> Trying to boot from MMC1
> 
> 
> U-Boot 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - 10:05:32 +1000)
> 
> SoC:   MV88F6828-A0 at 1600 MHz
> DRAM:  1 GiB (800 MHz, 32-bit, ECC not enabled)
> clearfog.c board_init part_config = 255
> Core:  38 devices, 22 uclasses, devicetree: separate
> MMC:   mv_sdh: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
> 
> Model: SolidRun Clearfog A1
> clearfog.c checkboard part_config = 16
> Board: SolidRun Clearfog Pro
> Net:
> Warning: ethernet at 70000 (eth1) using random MAC address - 92:5a:fc:14:e8:f6
> eth1: ethernet at 70000
> Warning: ethernet at 30000 (eth2) using random MAC address - 42:9c:d8:3a:cb:b2
> , eth2: ethernet at 30000
> Warning: ethernet at 34000 (eth3) using random MAC address - c6:99:20:f4:02:a0
> , eth3: ethernet at 34000
> Hit any key to stop autoboot:  0
> => mmc partconf 0
> EXT_CSD[179], PARTITION_CONFIG:
> BOOT_ACK: 0x0
> BOOT_PARTITION_ENABLE: 0x2
> PARTITION_ACCESS: 0x0
> </partition_enable 2>

Are both logs from the configuration when SPL+u-boot is stored on Boot0?
Could you try to erase Boot0 and store SPL+u-boot to Boot1? I'm
interested to see if "access" bits are changed in SPL (before loading
main u-boot).

> I'm having trouble trying to find the hooks which run between board_init
> and checkboard. If you can point me in the right direction I'm happy to
> re-run and try to narrow down where the valid values are being set from.

Print it directly in drivers/mmc/mmc.c mmc_startup_v4() where
mmc->part_config = is set from ext_csd[EXT_CSD_PART_CONF] register.
I want to see original value from EXT_CSD_PART_CONF.

I do not know which hook is the best, so printing it from mmc.c driver
should work better.