[PATCH v2 1/3] net: mvpp2: Drop PHY_INTERFACE_MODE_SGMII_2500 support
Marek Vasut
marek.vasut+renesas at mailbox.org
Tue Mar 21 18:25:52 CET 2023
This mode does not seem to be well defined and used anywhere, remove support for it.
Based on discussion:
- 1000baseX does c37 AN of duplex+pause
- SGMII does AN of duplex+pause+speed, at lower speed bytes are repeated 10x/100x
- 2500baseX does not do AN, or does very different c73 AN
- SGMII 2500 behavior is unclear
Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
---
Cc: "Ariel D'Alessandro" <ariel.dalessandro at collabora.com>
Cc: "Marek Behún" <kabel at kernel.org>
Cc: Joe Hershberger <joe.hershberger at ni.com>
Cc: Marek Vasut <marek.vasut+renesas at mailbox.org>
Cc: Ramon Fried <rfried.dev at gmail.com>
Cc: Stefan Roese <sr at denx.de>
Cc: Tim Harvey <tharvey at gateworks.com>
Cc: Vladimir Oltean <vladimir.oltean at nxp.com>
---
V2: Drop SGMII 2500 support, if it becomes required and/or standardized,
this patch can be reverted
---
drivers/net/mvpp2.c | 53 ---------------------------------------------
1 file changed, 53 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 1bad50d344c..c99d52c85d7 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -2871,7 +2871,6 @@ static void mvpp2_port_mii_set(struct mvpp2_port *port)
switch (port->phy_interface) {
case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_SGMII_2500:
val |= MVPP2_GMAC_INBAND_AN_MASK;
break;
case PHY_INTERFACE_MODE_1000BASEX:
@@ -2939,7 +2938,6 @@ static void mvpp2_port_loopback_set(struct mvpp2_port *port)
val &= ~MVPP2_GMAC_GMII_LB_EN_MASK;
if (port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
- port->phy_interface == PHY_INTERFACE_MODE_SGMII_2500 ||
port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
port->phy_interface == PHY_INTERFACE_MODE_2500BASEX)
val |= MVPP2_GMAC_PCS_LB_EN_MASK;
@@ -3027,48 +3025,6 @@ static int gop_bypass_clk_cfg(struct mvpp2_port *port, int en)
return 0;
}
-static void gop_gmac_sgmii2_5_cfg(struct mvpp2_port *port)
-{
- u32 val, thresh;
-
- /*
- * Configure minimal level of the Tx FIFO before the lower part
- * starts to read a packet
- */
- thresh = MVPP2_SGMII2_5_TX_FIFO_MIN_TH;
- val = readl(port->base + MVPP2_GMAC_PORT_FIFO_CFG_1_REG);
- val &= ~MVPP2_GMAC_TX_FIFO_MIN_TH_ALL_MASK;
- val |= MVPP2_GMAC_TX_FIFO_MIN_TH_MASK(thresh);
- writel(val, port->base + MVPP2_GMAC_PORT_FIFO_CFG_1_REG);
-
- /* Disable bypass of sync module */
- val = readl(port->base + MVPP2_GMAC_CTRL_4_REG);
- val |= MVPP2_GMAC_CTRL4_SYNC_BYPASS_MASK;
- /* configure DP clock select according to mode */
- val |= MVPP2_GMAC_CTRL4_DP_CLK_SEL_MASK;
- /* configure QSGMII bypass according to mode */
- val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK;
- writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
-
- val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
- /*
- * Configure GIG MAC to SGMII mode connected to a fiber
- * transceiver
- */
- val &= ~MVPP2_GMAC_PORT_TYPE_MASK;
- writel(val, port->base + MVPP2_GMAC_CTRL_0_REG);
-
- /* configure AN 0x9268 */
- val = MVPP2_GMAC_EN_PCS_AN |
- MVPP2_GMAC_AN_BYPASS_EN |
- MVPP2_GMAC_CONFIG_MII_SPEED |
- MVPP2_GMAC_CONFIG_GMII_SPEED |
- MVPP2_GMAC_FC_ADV_EN |
- MVPP2_GMAC_CONFIG_FULL_DUPLEX |
- MVPP2_GMAC_CHOOSE_SAMPLE_TX_CONFIG;
- writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
-}
-
static void gop_gmac_sgmii_cfg(struct mvpp2_port *port)
{
u32 val, thresh;
@@ -3239,9 +3195,6 @@ static int gop_gmac_mode_cfg(struct mvpp2_port *port)
case PHY_INTERFACE_MODE_SGMII:
gop_gmac_sgmii_cfg(port);
break;
- case PHY_INTERFACE_MODE_SGMII_2500:
- gop_gmac_sgmii2_5_cfg(port);
- break;
case PHY_INTERFACE_MODE_1000BASEX:
gop_gmac_1000basex_cfg(port);
break;
@@ -3422,7 +3375,6 @@ static int gop_port_init(struct mvpp2_port *port)
break;
case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_SGMII_2500:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
/* configure PCS */
@@ -3482,7 +3434,6 @@ static void gop_port_enable(struct mvpp2_port *port, int enable)
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_SGMII_2500:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
if (enable)
@@ -3519,7 +3470,6 @@ static u32 mvpp2_netc_cfg_create(int gop_id, phy_interface_t phy_type)
if (gop_id == 2) {
if (phy_type == PHY_INTERFACE_MODE_SGMII ||
- phy_type == PHY_INTERFACE_MODE_SGMII_2500 ||
phy_type == PHY_INTERFACE_MODE_1000BASEX ||
phy_type == PHY_INTERFACE_MODE_2500BASEX)
val |= MV_NETC_GE_MAC2_SGMII;
@@ -3530,7 +3480,6 @@ static u32 mvpp2_netc_cfg_create(int gop_id, phy_interface_t phy_type)
if (gop_id == 3) {
if (phy_type == PHY_INTERFACE_MODE_SGMII ||
- phy_type == PHY_INTERFACE_MODE_SGMII_2500 ||
phy_type == PHY_INTERFACE_MODE_1000BASEX ||
phy_type == PHY_INTERFACE_MODE_2500BASEX)
val |= MV_NETC_GE_MAC3_SGMII;
@@ -4529,7 +4478,6 @@ static void mvpp2_start_dev(struct mvpp2_port *port)
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_SGMII_2500:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
mvpp2_gmac_max_rx_size_set(port);
@@ -5263,7 +5211,6 @@ static int mvpp2_start(struct udevice *dev)
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_SGMII_2500:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
mvpp2_port_power_up(port);
--
2.39.2
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