[PATCH v3 4/5] arm: Add support for the Broadcom Northstar SoCs
Linus Walleij
linus.walleij at linaro.org
Tue Mar 21 22:13:11 CET 2023
The original Northstar is an ARM SoC series that comprise
BCM4709x and BCM5301x and uses a dual-core Cortex A9, the
global timer and a few other things.
This series should not be confused with North Star Plus
(NSP) which is partly supported by U-Boot already.
The SoC is well supported by the Linux kernel and OpenWrt
as it is used in many routers.
Since we currently don't need any chip-specific quirks
and can get the system up from just the device tree, a
mach-* directory doesn't even need to be added, just
some small Kconfig fragments.
Cc: Rafał Miłecki <rafal at milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
---
ChangeLog v1->v3:
- Bundle with the iproc nand and algo select patches
---
arch/arm/Kconfig | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index bd7fffcce0ba..ec129c6ff808 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -357,7 +357,7 @@ config SYS_ARM_ARCH
choice
prompt "Select the ARM data write cache policy"
- default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
+ default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || TARGET_BCMNS || RZA1
default SYS_ARM_CACHE_WRITEBACK
config SYS_ARM_CACHE_WRITEBACK
@@ -670,6 +670,25 @@ config TARGET_BCMCYGNUS
imply HASH_VERIFY
imply NETDEVICES
+config TARGET_BCMNS
+ bool "Support Broadcom Northstar"
+ select CPU_V7A
+ select DM
+ select DM_GPIO
+ select DM_SERIAL
+ select OF_CONTROL
+ select TIMER
+ select SYS_NS16550
+ select ARM_GLOBAL_TIMER
+ imply SYS_THUMB_BUILD
+ imply MTD_RAW_NAND
+ imply NAND_BRCMNAND
+ imply NAND_BRCMNAND_IPROC
+ help
+ Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
+ ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
+ BCM5301x etc.
+
config TARGET_BCMNS2
bool "Support Broadcom Northstar2"
select ARM64
--
2.39.2
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