DM SPI flash improvements

[Tony Dinh]

Hi Simon,

I'm investigating a problem with the Thecus N2350 board that has SPI
flash on controller 1, but not on controller 0. Booting with SPI SPL
is not possible with CONFIG_SF_DEFAULT_BUS=1.

Reference:
https://lists.denx.de/pipermail/u-boot/2023-March/511517.html

That led me to the drivers/mtd/spi/sf-uclass.c and drivers/spi/spi-uclass.c.

And I found there are some problems in the spi_flash_probe(), as well
as _spi_get_bus_and_cs(). But seeing your comment in the
spi_flash_probe function header, I'm thinking perhaps I should not try
to fix them.

/*
 * TODO(sjg at chromium.org): This is an old-style function. We should remove
 * it when all SPI flash drivers use dm
 */
struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
                                  unsigned int max_hz, unsigned int spi_mode)

Could you or Jagan clarify the TODO above meaning? Are we fully in DM
SPI yet? If we are, should this be replaced with other means to probe
the SPI bus? Or it should have been automatically probed by DM SPI
infrastructure, and we just need to tag the SPI 1 DTS node with
boot-phase? If that's the case then perhaps this function should be
defined out with some configs wrapping.

My current SPI configs:

CONFIG_SPL_DM_SPI=y
CONFIG_SPL_DM_SPI_FLASH=y
# CONFIG_DM_HWSPINLOCK is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_SPI=y
CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SF_DEFAULT_MODE=0x0
# CONFIG_CMD_SF_TEST is not set
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SF_DEFAULT_CS=0

Thanks,
Tony