[PATCH v2 00/16] x86: Various minor enhancements for coreboot

Simon Glass sjg at chromium.org
Mon Mar 27 05:05:10 CEST 2023


Hi Bin,

On Fri, 24 Mar 2023 at 07:32, Simon Glass <sjg at chromium.org> wrote:
>
> This series includes some patches generated while getting U-Boot to boot
> more nicely on Brya, an Adler Lake Chromebook.
>
> This includes:
> - show the ACPI tables with 'acpi list'
> - get the UART to work even if coreboot doesn't enable it
> - show unimplemented sysinfo tags
> - fix for keyboard not working
> - fix for trying to set up PCI regions when the info is not available
> - fix for looking at inaccessible memory to find the sysinfo table
>
> Changes in v2:
> - Don't show an invalid CPU number on error
> - Update commit message with more detail
> - Update code comment to mention that addresses <1KB are ignored
> - Flush the buffer instead of skipping the reset
> - Add new patch to create a new Kconfig for ACPI
> - Add new patch to move acpi-table-finding functions into the library
> - Use tab instead of space in header file
> - Refactor two patches into one
> - Add new patch to allow locating the UART from ACPI tables
> - Expand commit message to explain this is for the debug UART
> - Update the defconfig instead
> - Drop patch 'usb: Quieten a debug message' since it was fixed elsewhere
> - Drop patch 'x86: coreboot: Use a memory-mapped UART' (not needed)
> - Add new patch to enable ms command
> - Move this patch to last in the series, so it can be dropped if needed
>
> Simon Glass (16):
>   mtrr: Don't show an invalid CPU number
>   x86: Adjust search range for sysinfo table
>   input: Flush the keyboard buffer before resetting it
>   acpi: Create a new Kconfig for ACPI
>   acpi: Move the table-finding functions into the libary
>   x86: coreboot: Collect the address of the ACPI tables
>   x86: Allow locating the UART from ACPI tables
>   pci: coreboot: Don't read regions when booting
>   x86: coreboot: Use a memory-mapped UART
>   x86: coreboot: Document how to enable the debug UART
>   x86: coreboot: Scan PCI after relocation
>   x86: coreboot: Log function names and line numbers
>   x86: coreboot: Show unimplemented sysinfo tags
>   x86: nvme: coreboot: Enable NVMe
>   coreboot: Enable ms command
>   x86: Allow locating UARTs by device ID
>
>  arch/x86/cpu/cpu.c                     |   4 +-
>  arch/x86/dts/coreboot.dts              |   4 +
>  arch/x86/include/asm/cb_sysinfo.h      |   8 ++
>  arch/x86/include/asm/coreboot_tables.h |   2 +
>  arch/x86/lib/coreboot/cb_sysinfo.c     |  13 +++
>  cmd/Kconfig                            |   2 +-
>  cmd/acpi.c                             |  44 +------
>  cmd/x86/cbsysinfo.c                    |   9 ++
>  cmd/x86/mtrr.c                         |   6 +-
>  configs/coreboot64_defconfig           |   1 -
>  configs/coreboot_defconfig             |  10 +-
>  doc/board/coreboot/coreboot.rst        |  29 +++++
>  drivers/core/Kconfig                   |   1 +
>  drivers/input/i8042.c                  |  19 +++
>  drivers/nvme/nvme_pci.c                |   8 ++
>  drivers/pci/pci-uclass.c               |   4 +
>  drivers/serial/Kconfig                 |  10 ++
>  drivers/serial/serial_coreboot.c       | 155 +++++++++++++++++++++++--
>  include/acpi/acpi_table.h              |   8 ++
>  include/asm-generic/global_data.h      |   4 +-
>  include/pci_ids.h                      |   3 +
>  lib/Kconfig                            |  11 +-
>  lib/Makefile                           |   2 +-
>  lib/acpi/Makefile                      |   6 +
>  lib/acpi/acpi.c                        |  45 +++++++
>  25 files changed, 350 insertions(+), 58 deletions(-)
>  create mode 100644 lib/acpi/acpi.c
>
> --
> 2.40.0.348.gf938b09366-goog
>

I found a few problems with this series on other boards, so will send a v3.

Regards,
Simon


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