[PATCH v4 06/14] net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC

sbabic at denx.de sbabic at denx.de
Thu Mar 30 17:23:20 CEST 2023

> The driver currently only waits for DMA_MODE SWR bit to clear itself.
> This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset
> before IOMUX GPR[1] content is latched into the MAC and used. Without
> the proper reset, the i.MX8M Plus MAC variant does not take the value
> in IOMUX GPR[1] into account, which makes it impossible e.g. to switch
> interface mode from RGMII to any other.
> Since proper reset is desired in general to put the block into defined
> state, always assert the DMA_MODE SWR bit before waiting for the bit
> to clear itself.
> Reviewed-by: Ramon Fried <rfried.dev at gmail.com>
> Signed-off-by: Marek Vasut <marex at denx.de>
Applied to u-boot-imx, next, thanks !

Best regards,
Stefano Babic

DENX Software Engineering GmbH,        Managing Director: Erika Unter  
HRB 165235 Munich,   Office: Kirchenstr.5, 82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de

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