[PATCH 3/6] configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR

[Patrice CHOTARD]

On 4/27/23 15:36, Patrick Delaunay wrote:
> Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
> before relocation, to support DDR with only 256MB because the OP-TEE
> reserved memory is located at end of the DDR.
> 
> By default the new size of 128MB cacheable memory is enough
> in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
> and is correct for DDR size = 256MB.
> 
> After relocation the real size of DDR, excluding the no-map reserved
> memory, is used after the U-Boot device tree parsing.
> 
> Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
> ---
> 
>  configs/stm32mp13_defconfig | 2 +-
>  configs/stm32mp15_defconfig | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index b076573c450f..4c1e412af0e6 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -7,7 +7,7 @@ CONFIG_ENV_OFFSET=0x900000
>  CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
>  CONFIG_SYS_PROMPT="STM32MP> "
>  CONFIG_STM32MP13x=y
> -CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> +CONFIG_DDR_CACHEABLE_SIZE=0x8000000
>  CONFIG_CMD_STM32KEY=y
>  CONFIG_TARGET_ST_STM32MP13x=y
>  CONFIG_ENV_OFFSET_REDUND=0x940000
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index a8eda7b4ad88..b912d6735bc0 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -7,7 +7,7 @@ CONFIG_ENV_OFFSET=0x480000
>  CONFIG_ENV_SECT_SIZE=0x40000
>  CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
>  CONFIG_SYS_PROMPT="STM32MP> "
> -CONFIG_DDR_CACHEABLE_SIZE=0x10000000
> +CONFIG_DDR_CACHEABLE_SIZE=0x8000000
>  CONFIG_CMD_STM32KEY=y
>  CONFIG_TYPEC_STUSB160X=y
>  CONFIG_TARGET_ST_STM32MP15x=y
Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>

Thanks
Patrice