[PATCH 02/14] arch: arm: dts: k3-j7200: Fix physical address of pin

[Nishanth Menon]

On 09:43-20230503, Udit Kumar wrote:
> From: Keerthy <j-keerthy at ti.com>
> 
> wkup_pmx splits into multiple regions. Like
> 
>     wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
>     wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15)
>     wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84)
>     wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100)
> 
> With this split, pin offset needs to be adjusted to
> match with new pmx for all pins above wkup_pmx0.
> 
> Example a pin under wkup_pmx1 should start from 0 instead of
> old offset(0x38 WKUP_PADCONFIG 14 offset)
> 
> J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) :
> https://www.ti.com/lit/ds/symlink/dra821u.pdf
> 
> Signed-off-by: Keerthy <j-keerthy at ti.com>
> Signed-off-by: Udit Kumar <u-kumar1 at ti.com>
> ---
>  arch/arm/dts/k3-j7200-common-proc-board.dts | 28 ++++++++++-----------
>  1 file changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
> index 0d39d6b8cc..63633e4f6c 100644
> --- a/arch/arm/dts/k3-j7200-common-proc-board.dts
> +++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
> @@ -83,25 +83,25 @@
>  &wkup_pmx2 {
>  	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
>  		pinctrl-single,pins = <
> -			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
> -			J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
> -			J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
> -			J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
> -			J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
> -			J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
> -			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
> -			J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
> -			J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
> -			J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
> -			J721E_WKUP_IOPAD(0x0080, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
> -			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
> +			J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
> +			J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
> +			J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
> +			J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
> +			J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
> +			J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
> +			J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
> +			J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
> +			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
> +			J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
> +			J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
> +			J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
>  		>;
>  	};
>  
>  	mcu_mdio_pins_default: mcu-mdio1-pins-default {
>  		pinctrl-single,pins = <
> -			J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
> -			J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
> +			J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
> +			J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>  		>;
>  	};
>  };
> -- 
> 2.34.1
> 

Not in upstream k.org. NAK.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D