[PATCH 04/14] arch: arm: dts: k3-j7200: Add general purpose timers
Nishanth Menon
nm at ti.com
Wed May 3 16:30:49 CEST 2023
On 09:43-20230503, Udit Kumar wrote:
> There are 20 general purpose timers on j7200 that can be used for things
> like PWM using pwm-omap-dmtimer driver. There are also additional ten
> timers in the MCU domain.
>
> MCU timer 0 is used by R5 uboot as always on. So change properties
> in u-boot specific files
>
> Signed-off-by: Udit Kumar <u-kumar1 at ti.com>
> ---
NAK. upstream k.org first.
> .../k3-j7200-common-proc-board-u-boot.dtsi | 7 +
> arch/arm/dts/k3-j7200-main.dtsi | 240 ++++++++++++++++++
> arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 130 ++++++++++
> 3 files changed, 377 insertions(+)
>
> diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> index f57c2306ba..789dc54617 100644
> --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> @@ -30,7 +30,14 @@
> bootph-pre-ram;
>
> timer1: timer at 40400000 {
> + /delete-property/ clocks;
> + /delete-property/ clock-name;
> + /delete-property/ assigned-clocks;
> + /delete-property/ assigned-clock-parents;
> + /delete-property/ power-domains;
> + /delete-property/ ti,timer-pwm;
> compatible = "ti,omap5430-timer";
> + status = "okay";
Curious: Do we need to delete all these properties, cant we get the R5 SPL to
work with these?
> reg = <0x0 0x40400000 0x0 0x80>;
> ti,timer-alwon;
> clock-frequency = <250000000>;
> diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
> index 138381f43c..54795db9c3 100644
> --- a/arch/arm/dts/k3-j7200-main.dtsi
> +++ b/arch/arm/dts/k3-j7200-main.dtsi
> @@ -795,6 +795,246 @@
> assigned-clock-parents = <&k3_clks 253 5>;
> };
>
> + main_timer0: timer at 2400000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2400000 0x00 0x400>;
> + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 49 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 49 1>;
> + assigned-clock-parents = <&k3_clks 49 2>;
> + power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer1: timer at 2410000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2410000 0x00 0x400>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 50 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 50 1>;
> + assigned-clock-parents = <&k3_clks 50 2>;
> + power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer2: timer at 2420000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2420000 0x00 0x400>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 51 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 51 1>;
> + assigned-clock-parents = <&k3_clks 51 2>;
> + power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer3: timer at 2430000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2430000 0x00 0x400>;
> + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 52 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 52 1>;
> + assigned-clock-parents = <&k3_clks 52 2>;
> + power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer4: timer at 2440000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2440000 0x00 0x400>;
> + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 53 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 53 1>;
> + assigned-clock-parents = <&k3_clks 53 2>;
> + power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer5: timer at 2450000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2450000 0x00 0x400>;
> + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 54 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 54 1>;
> + assigned-clock-parents = <&k3_clks 54 2>;
> + power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer6: timer at 2460000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2460000 0x00 0x400>;
> + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 55 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 55 1>;
> + assigned-clock-parents = <&k3_clks 55 2>;
> + power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer7: timer at 2470000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2470000 0x00 0x400>;
> + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 57 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 57 1>;
> + assigned-clock-parents = <&k3_clks 57 2>;
> + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer8: timer at 2480000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2480000 0x00 0x400>;
> + interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 58 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 58 1>;
> + assigned-clock-parents = <&k3_clks 58 2>;
> + power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer9: timer at 2490000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2490000 0x00 0x400>;
> + interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 59 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 59 1>;
> + assigned-clock-parents = <&k3_clks 59 2>;
> + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer10: timer at 24a0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24a0000 0x00 0x400>;
> + interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 60 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 60 1>;
> + assigned-clock-parents = <&k3_clks 60 2>;
> + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer11: timer at 24b0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24b0000 0x00 0x400>;
> + interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 62 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 62 1>;
> + assigned-clock-parents = <&k3_clks 62 2>;
> + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer12: timer at 24c0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24c0000 0x00 0x400>;
> + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 63 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 63 1>;
> + assigned-clock-parents = <&k3_clks 63 2>;
> + power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer13: timer at 24d0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24d0000 0x00 0x400>;
> + interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 63 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 63 1>;
> + assigned-clock-parents = <&k3_clks 63 2>;
> + power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer14: timer at 24e0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24e0000 0x00 0x400>;
> + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 65 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 65 1>;
> + assigned-clock-parents = <&k3_clks 65 2>;
> + power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer15: timer at 24f0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24f0000 0x00 0x400>;
> + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 66 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 66 1>;
> + assigned-clock-parents = <&k3_clks 66 2>;
> + power-domains = <&k3_pds 66 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer16: timer at 2500000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2500000 0x00 0x400>;
> + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 67 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 67 1>;
> + assigned-clock-parents = <&k3_clks 67 2>;
> + power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer17: timer at 2510000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2510000 0x00 0x400>;
> + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 68 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 68 1>;
> + assigned-clock-parents = <&k3_clks 68 2>;
> + power-domains = <&k3_pds 68 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer18: timer at 2520000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2520000 0x00 0x400>;
> + interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 69 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 69 1>;
> + assigned-clock-parents = <&k3_clks 69 2>;
> + power-domains = <&k3_pds 69 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer19: timer at 2530000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2530000 0x00 0x400>;
> + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 70 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 70 1>;
> + assigned-clock-parents = <&k3_clks 70 2>;
> + power-domains = <&k3_pds 70 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> main_r5fss0: r5fss at 5c00000 {
> compatible = "ti,j7200-r5fss";
> ti,cluster-mode = <1>;
> diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
> index de56a0165b..02c2493064 100644
> --- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
> @@ -34,6 +34,136 @@
> };
> };
>
> + mcu_timer0: timer at 40400000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40400000 0x00 0x400>;
> + interrupts = <GIC_SPI 816 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 35 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 35 1>;
> + assigned-clock-parents = <&k3_clks 35 2>;
> + power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer1: timer at 40410000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40410000 0x00 0x400>;
> + interrupts = <GIC_SPI 817 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 71 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 71 1>;
> + assigned-clock-parents = <&k3_clks 71 2>;
> + power-domains = <&k3_pds 71 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer2: timer at 40420000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40420000 0x00 0x400>;
> + interrupts = <GIC_SPI 818 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 72 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 72 1>;
> + assigned-clock-parents = <&k3_clks 72 2>;
> + power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer3: timer at 40430000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40430000 0x00 0x400>;
> + interrupts = <GIC_SPI 819 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 73 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 73 1>;
> + assigned-clock-parents = <&k3_clks 73 2>;
> + power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer4: timer at 40440000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40440000 0x00 0x400>;
> + interrupts = <GIC_SPI 820 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 74 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 74 1>;
> + assigned-clock-parents = <&k3_clks 74 2>;
> + power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer5: timer at 40450000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40450000 0x00 0x400>;
> + interrupts = <GIC_SPI 821 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 75 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 75 1>;
> + assigned-clock-parents = <&k3_clks 75 2>;
> + power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer6: timer at 40460000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40460000 0x00 0x400>;
> + interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 76 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 76 1>;
> + assigned-clock-parents = <&k3_clks 76 2>;
> + power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer7: timer at 40470000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40470000 0x00 0x400>;
> + interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 77 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 77 1>;
> + assigned-clock-parents = <&k3_clks 77 2>;
> + power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer8: timer at 40480000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40480000 0x00 0x400>;
> + interrupts = <GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 78 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 78 1>;
> + assigned-clock-parents = <&k3_clks 78 2>;
> + power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + mcu_timer9: timer at 40490000 {
> + compatible = "ti,am654-timer";
> + status = "reserved";
> + reg = <0x00 0x40490000 0x00 0x400>;
> + interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 79 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 79 1>;
> + assigned-clock-parents = <&k3_clks 79 2>;
> + power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> mcu_conf: syscon at 40f00000 {
> compatible = "syscon", "simple-mfd";
> reg = <0x00 0x40f00000 0x00 0x20000>;
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
More information about the U-Boot
mailing list