[PATCH v3 07/16] x86: Allow locating the UART from ACPI tables

Bin Meng bmeng.cn at gmail.com
Thu May 4 15:18:38 CEST 2023


On Mon, Mar 27, 2023 at 12:16 PM Simon Glass <sjg at chromium.org> wrote:
>
> When coreboot does not pass a UART in its sysinfo struct, there is no
> easy way to find it out.
>
> Since coreboot does not actually init the serial device when serial is
> disabled, it is not possible to make it add this information to the
> sysinfo table.
>
> Add a way to obtain this information from the DBG2 ACPI table, which is
> normally set up by coreboot.
>
> For now this only supports a memory-mapped 16550-style UART.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v3:
> - Disable for coreboot64 since ACPI is not available
>
> Changes in v2:
> - Add new patch to allow locating the UART from ACPI tables
>
>  drivers/serial/Kconfig           |  10 +++
>  drivers/serial/serial_coreboot.c | 114 ++++++++++++++++++++++++++++---
>  2 files changed, 116 insertions(+), 8 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>


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