[PATCH 07/14] rockchip: rk3568-rock-3a: Use pinctrl for sdmmc and sdhci in SPL

[Kever Yang]

On 2023/4/22 09:23, Jonas Karlman wrote:
> Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
> image from SD and eMMC storage when booting from SPI NOR flash.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 52 +++++++++++++++++++++++++
>   configs/rock-3a-rk3568_defconfig        |  3 +-
>   2 files changed, 54 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> index 801c91af5b41..b2af3b1dbed6 100644
> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -13,6 +13,58 @@
>   	};
>   };
>   
> +&pinctrl {
> +	bootph-pre-ram;
> +};
> +
> +&pcfg_pull_up {
> +	bootph-pre-ram;
> +};
> +
> +&pcfg_pull_none {
> +	bootph-pre-ram;
> +};
> +
> +&pcfg_pull_up_drv_level_2 {
> +	bootph-pre-ram;
> +};
> +
> +&uart2m0_xfer {
> +	bootph-pre-ram;
> +};
> +
> +&sdmmc0_bus4 {
> +	bootph-pre-ram;
> +};
> +
> +&sdmmc0_clk {
> +	bootph-pre-ram;
> +};
> +
> +&sdmmc0_cmd {
> +	bootph-pre-ram;
> +};
> +
> +&sdmmc0_det {
> +	bootph-pre-ram;
> +};
> +
> +&emmc_bus8 {
> +	bootph-pre-ram;
> +};
> +
> +&emmc_clk {
> +	bootph-pre-ram;
> +};
> +
> +&emmc_cmd {
> +	bootph-pre-ram;
> +};
> +
> +&emmc_datastrobe {
> +	bootph-pre-ram;
> +};
> +
>   &sdhci {
>   	cap-mmc-highspeed;
>   	mmc-ddr-1_8v;
> diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
> index 5126feb6b11d..2e556dc2c1a2 100644
> --- a/configs/rock-3a-rk3568_defconfig
> +++ b/configs/rock-3a-rk3568_defconfig
> @@ -46,7 +46,7 @@ CONFIG_CMD_REGULATOR=y
>   # CONFIG_SPL_DOS_PARTITION is not set
>   CONFIG_SPL_OF_CONTROL=y
>   CONFIG_OF_LIVE=y
> -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>   CONFIG_SPL_REGMAP=y
>   CONFIG_SPL_SYSCON=y
>   CONFIG_SPL_CLK=y
> @@ -63,6 +63,7 @@ CONFIG_ETH_DESIGNWARE=y
>   CONFIG_GMAC_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> +CONFIG_SPL_PINCTRL=y
>   CONFIG_DM_PMIC=y
>   CONFIG_PMIC_RK8XX=y
>   CONFIG_REGULATOR_RK8XX=y