[PATCH 6/8] rockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF support
Kever Yang
kever.yang at rock-chips.com
Tue May 9 14:12:03 CEST 2023
On 2023/4/23 02:19, Jonas Karlman wrote:
> Add dummy support for the CLK_PCIEPHY2_REF clock.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> drivers/clk/rockchip/clk_rk3568.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
> index cefc263971a6..c8e688789e4c 100644
> --- a/drivers/clk/rockchip/clk_rk3568.c
> +++ b/drivers/clk/rockchip/clk_rk3568.c
> @@ -427,6 +427,7 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate)
> break;
> case CLK_PCIEPHY0_REF:
> case CLK_PCIEPHY1_REF:
> + case CLK_PCIEPHY2_REF:
> return 0;
> default:
> return -ENOENT;
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