[PATCH 7/8] rockchip: rk3568-rock-3a: Enable PCIe and NVMe support

[Kever Yang]

Hi Jonas,


On 2023/4/23 02:19, Jonas Karlman wrote:
> Add missing pinctrl and defconfig options to enable PCIe and NVMe
> support on Radxa ROCK 3 Model A.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
> ---
>   arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 14 ++++++++++++++
>   configs/rock-3a-rk3568_defconfig        |  4 ++++
>   2 files changed, 18 insertions(+)
>
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> index 8abee24c02c3..f3ee50949cc0 100644
> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -19,6 +19,12 @@
>   
>   &pinctrl {
>   	bootph-pre-ram;
> +
> +	pcie {
> +		pcie3x2_reset_h: pcie3x2-reset-h {
> +			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
>   };
>   
>   &pcfg_pull_up {
> @@ -73,6 +79,14 @@
>   	bootph-pre-ram;
>   };
>   
> +&pcie2x1 {
> +	pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>;
> +};
> +
> +&pcie3x2 {
> +	pinctrl-0 = <&pcie30x2m1_pins &pcie3x2_reset_h>;
> +};
     Did you really met issue without this patch?

     The pcie using GPIO for reset and other function instead of pcie 
function, and these GPIOs's default

setting is GPIO, so they should work by default.


Thanks,

- Kever

> +
>   &sfc {
>   	bootph-pre-ram;
>   	u-boot,spl-sfc-no-dma;
> diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
> index 64864a300153..9d725b82a96a 100644
> --- a/configs/rock-3a-rk3568_defconfig
> +++ b/configs/rock-3a-rk3568_defconfig
> @@ -46,6 +46,7 @@ CONFIG_CMD_GPIO=y
>   CONFIG_CMD_GPT=y
>   CONFIG_CMD_I2C=y
>   CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
>   CONFIG_CMD_USB=y
>   # CONFIG_CMD_SETEXPR is not set
>   CONFIG_CMD_PMIC=y
> @@ -70,6 +71,9 @@ CONFIG_SPI_FLASH_MACRONIX=y
>   CONFIG_SPI_FLASH_XTX=y
>   CONFIG_ETH_DESIGNWARE=y
>   CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>   CONFIG_SPL_PINCTRL=y