[Uboot-stm32] [PATCH v2] ARM: stm32: Add IWDG handling into PSCI suspend code

Patrick DELAUNAY patrick.delaunay at foss.st.com
Fri May 12 15:52:37 CEST 2023


On 5/11/23 21:55, Marek Vasut wrote:
> In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never
> be disabled again. That includes low power states, which means that if the
> IWDG is enabled, the SoC would reset itself after a while in suspend via
> the IWDG. This is not desired behavior.
> It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI,
> and use that IRQ to wake the CPU up before the IWDG timeout is reached and
> reset is triggered. This pre-timeout IRQ can be used to reload the WDT and
> then suspend the CPU again every once in a while.
> Implement this functionality for both IWDG1 and IWDG2 by reading out all
> the unmasked IRQs, comparing the list with currently pending IRQs in GICv3:
> - If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ,
>    wake up and let OS handle the IRQs
> - If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending,
>    ping the respective IWDG and suspend again
> This does not seem to have any adverse impact on power consumption in suspend.
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Ilias Apalodimas <ilias.apalodimas at linaro.org>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
> Cc: Sughosh Ganu <sughosh.ganu at linaro.org>
> Cc: u-boot at lists.denx.de
> Cc: uboot-stm32 at st-md-mailman.stormreply.com
> ---
> V2: Ping the IWDG before entering WFI to assure they would not reset the SoC
> ---
>   arch/arm/mach-stm32mp/include/mach/stm32.h |  2 +
>   arch/arm/mach-stm32mp/psci.c               | 73 ++++++++++++++++++++--
>   2 files changed, 70 insertions(+), 5 deletions(-)

Reviewed-by: Patrick Delaunay <patrick.delaunay at foss.st.com>


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