[PATCH v2 8/9] rockchip: rk3568-rock-3a: Enable PCIe and NVMe support
Jonas Karlman
jonas at kwiboo.se
Thu May 18 00:53:48 CEST 2023
Add missing pinctrl and defconfig options to enable PCIe and NVMe
support on Radxa ROCK 3 Model A.
Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1.
The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is
restored to the perstn pin, a workaround to avoid having to define
a new rockchip,pins.
Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
v2:
- Update commit message
- Disable pcie2x1 to work around a possible sys freeze issue
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 16 ++++++++++++++++
configs/rock-3a-rk3568_defconfig | 4 ++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index bbf54f888fa0..bbfce7f4c247 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -36,8 +36,24 @@
bootph-all;
};
+&pcie2x1 {
+ pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>;
+ /* Shared vpcie3v3-supply may cause a sys freeze, disable for now */
+ status = "disabled";
+};
+
+&pcie3x2 {
+ pinctrl-0 = <&pcie30x2m1_pins &pcie3x2_reset_h>;
+};
+
&pinctrl {
bootph-all;
+
+ pcie {
+ pcie3x2_reset_h: pcie3x2-reset-h {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pcfg_pull_none {
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index 64864a300153..16775015afa2 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -23,6 +23,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -46,6 +47,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PMIC=y
@@ -70,6 +72,8 @@ CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
--
2.40.1
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