[PATCH] ARM: stm32: Power cycle Buck3 in reset on DHSOM

[Marek Vasut]

On 5/25/23 10:08, Patrick DELAUNAY wrote:
> Hi Marek,

Hello Patrick,

sorry for the abysmal delay.

> On 5/18/23 00:02, Marek Vasut wrote:
>> In case the DHSOM is in suspend state and either reset button is pushed
>> or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
>> as follows:
>>
>>    "
>>    RAM: DDR3L 32bits 2x4Gb 533MHz
>>    DDR invalid size : 0x4, expected 0x40000000
>>    DRAM init failed: -22
>>    ### ERROR ### Please RESET the board ###
>>    "
>>
>> Avoid this failure by not keeping any Buck regulators enabled during 
>> reset,
>> let the SoC and DRAMs power cycle fully. Since the change which keeps 
>> Buck3
>> VDD enabled during reset is ST specific, move this addition to ST 
>> specific
>> SPL board initialization so that it wouldn't affect the DHSOM .
> 
>> Signed-off-by: Marek Vasut <marex at denx.de>
>> ---
>> NOTE: This is 2023.07 material
>> NOTE: d1a4b09de64 ("board: st: stpmic1: add function stpmic1_init")
>>        mentions 'keep vdd on during the reset cycle (to avoid issue
>>        when backup battery is absent)', but there is no further
>>        description of the 'issue'. Can you please elaborate ?
> 
> 
> 
> In the commit message of d1a4b09de643 ("board: st: stpmic1:
> 
> add function stpmic1_init"), I indicated
> 
>    - keep vdd on during the reset cycle (to avoid issue when backup battery
>        is absent)
> 
> 
> On ST boards we have support of cell coin to allow support of backup 
> domain,
> 
> but by default this cell are absent and the backup domain is directly 
> powered
> 
> by VDD (directly connected by resistor).
> 
> 
> We keep powered this domain to don't loss the backup domain support,
> 
> to avoid to loss the information saved in backup RAM / registers,
> 
> and to be abble to keep DEBUG part powered also.
> 
> 
> On this ST board, if the VDD is shut down with reset, the backup domain 
> can't be
> 
> correctly managed for reboot.
> 
> 
> And to handle correctly power OFF on ST boards with PMIC, we will don't 
> shut down
> 
> the VDD (full PMIC shut down) but we keep it.
> 
> 
> So the backup domain is loosed on ST board with STPMIC1 only when the power
> 
> is removed and not for reset or for power off.

Thank you for the clarification.

I should check suspend/resume on EV1 soon ...