[RFC PATCH 10/17] clk: sunxi: Add support for the D1 CCU

Sam Edwards cfsworks at gmail.com
Tue May 30 02:58:54 CEST 2023


Hey again Andre,

On 5/26/23 20:15, Sam Edwards wrote:
> My "no success" is Linux stalling indefinitely at:
> [    0.123090] smp: Bringing up secondary CPUs ...

OK, correction: my "no success" was Linux being unable to access the 
GIC, so boot was getting stuck. This was because it was running in 
nonsec mode and the GIC wasn't getting the interrupts moved over into 
group1.

The root cause of THAT was that the T113's CBAR's PERIPHBASE is still 
0x01C80000, where the GIC used to be on the older ARM sunxis. Allwinner 
never updated their ARM cores when they moved the GIC to 0x03020000!

Guess we need a `#define CFG_ARM_GIC_BASE_ADDRESS 0x03020000`. Where do 
you recommend I put that? :)

I also think sunxi/psci.c:psci_arch_init needs some cleanup:
- It sets GICC_PMR to 0xFF, which should probably be removed because 
that was already done by `_nonsec_init`
- It tries to clear the NS bit of SCR to enter secure mode, but the NS 
bit is just enabled later in `_secure_monitor`. So that should also be 
removed because it has no effect.

So, I'll have a few PSCI patches for you soon -- once I rest up from all 
of that GIC debugging, that is!

Cheers,
Sam


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