[PATCH v1] dt-bindings: riscv: deprecate riscv,isa

Conor Dooley conor.dooley at microchip.com
Tue May 30 16:12:12 CEST 2023

On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:

> > 
> > Why not just have something like
> > 
> > mycpu {
> > 	...
> > 	riscv,isa {
> > 		i;
> > 		m;
> > 		a;
> > 		zicsr;
> > 		...
> > 	};
> > };
> Naming of the node aside (perhaps that could be riscv,isa-extensions)
> there's not something hitting me immediately as to why that is a no-no.
> If the size is a concern, this would certainly be more efficient & not
> like the probing would be anything other than trivial more difficult
> what I have in my proposal.

Having started messing around with this, one of the main advantages, to
me, of this approach is proper validation.
cpus.yaml has additionalProperties: true in it, which would have had to
be sorted out, or worked around, but creating a child-node with the
properties in it allows setting additionalProperties: false.

> Rob's AFK at the moment, and I was hoping that he would take a look at
> the idea, so I won't respin til he is back, but I'll give this a go in
> the interim.

Mechanically, the conversion of the patch isn't difficult, but I'll still
wait for Rob to come back before sending a v2. But that v2 will more
than likely implement your suggestion.

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