[PATCH 01/10] ARM: rmobile: Deduplicate R-Car Gen3/Gen4 reset_cpu()

Marek Vasut marek.vasut+renesas at mailbox.org
Wed May 31 23:13:07 CEST 2023


The reset_cpu() implementation is basically the same across Gen3
SoCs and identical across Gen4 SoCs. Introduce weak default for
reset_cpu(), so that it does not have to be duplicated in every
board file again.

There is a slight difference for CA53 only systems, like E3 and D3,
which now check MIDR for CPU ID first just like the other systems,
but this is OK since the MIDR always returns CA53 core type and the
correct reset register is written.

Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
---
 board/renesas/condor/condor.c         | 22 ----------------
 board/renesas/draak/draak.c           |  9 -------
 board/renesas/eagle/eagle.c           | 22 ----------------
 board/renesas/ebisu/ebisu.c           |  9 -------
 board/renesas/falcon/falcon.c         |  7 -----
 board/renesas/rcar-common/common.c    | 37 +++++++++++++++++++++++++++
 board/renesas/salvator-x/salvator-x.c | 13 ++--------
 board/renesas/spider/spider.c         |  5 ----
 board/renesas/whitehawk/whitehawk.c   |  5 ----
 9 files changed, 39 insertions(+), 90 deletions(-)

diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c
index 2dd2c1534c1..fdb95ac1a59 100644
--- a/board/renesas/condor/condor.c
+++ b/board/renesas/condor/condor.c
@@ -23,25 +23,3 @@ int board_init(void)
 {
 	return 0;
 }
-
-#define RST_BASE	0xE6160000
-#define RST_CA57RESCNT	(RST_BASE + 0x40)
-#define RST_CA53RESCNT	(RST_BASE + 0x44)
-#define RST_RSTOUTCR	(RST_BASE + 0x58)
-#define RST_CA57_CODE	0xA5A5000F
-#define RST_CA53_CODE	0x5A5A000F
-
-void reset_cpu(void)
-{
-	unsigned long midr, cputype;
-
-	asm volatile("mrs %0, midr_el1" : "=r" (midr));
-	cputype = (midr >> 4) & 0xfff;
-
-	if (cputype == 0xd03)
-		writel(RST_CA53_CODE, RST_CA53RESCNT);
-	else if (cputype == 0xd07)
-		writel(RST_CA57_CODE, RST_CA57RESCNT);
-	else
-		hang();
-}
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 71efeaf3131..1ed72d34a74 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -67,12 +67,3 @@ int board_init(void)
 
 	return 0;
 }
-
-#define RST_BASE	0xE6160000
-#define RST_CA53RESCNT	(RST_BASE + 0x44)
-#define RST_CA53_CODE	0x5A5A000F
-
-void reset_cpu(void)
-{
-	writel(RST_CA53_CODE, RST_CA53RESCNT);
-}
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 9af935c33f6..e9e8059ef6d 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -68,25 +68,3 @@ int board_init(void)
 {
 	return 0;
 }
-
-#define RST_BASE	0xE6160000
-#define RST_CA57RESCNT	(RST_BASE + 0x40)
-#define RST_CA53RESCNT	(RST_BASE + 0x44)
-#define RST_RSTOUTCR	(RST_BASE + 0x58)
-#define RST_CA57_CODE	0xA5A5000F
-#define RST_CA53_CODE	0x5A5A000F
-
-void reset_cpu(void)
-{
-	unsigned long midr, cputype;
-
-	asm volatile("mrs %0, midr_el1" : "=r" (midr));
-	cputype = (midr >> 4) & 0xfff;
-
-	if (cputype == 0xd03)
-		writel(RST_CA53_CODE, RST_CA53RESCNT);
-	else if (cputype == 0xd07)
-		writel(RST_CA57_CODE, RST_CA57RESCNT);
-	else
-		hang();
-}
diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c
index 9a701925961..fd2d9906104 100644
--- a/board/renesas/ebisu/ebisu.c
+++ b/board/renesas/ebisu/ebisu.c
@@ -34,12 +34,3 @@ int board_init(void)
 {
 	return 0;
 }
-
-#define RST_BASE	0xE6160000
-#define RST_CA53RESCNT	(RST_BASE + 0x44)
-#define RST_CA53_CODE	0x5A5A000F
-
-void reset_cpu(void)
-{
-	writel(RST_CA53_CODE, RST_CA53RESCNT);
-}
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index ab7464d0ee3..0aa0f1afcbf 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -84,8 +84,6 @@ int board_early_init_f(void)
 }
 
 #define RST_BASE	0xE6160000 /* Domain0 */
-#define RST_SRESCR0	(RST_BASE + 0x18)
-#define RST_SPRES	0x5AA58000
 #define RST_WDTRSTCR	(RST_BASE + 0x10)
 #define RST_RWDT	0xA55A8002
 
@@ -103,8 +101,3 @@ int board_init(void)
 
 	return 0;
 }
-
-void reset_cpu(void)
-{
-	writel(RST_SPRES, RST_SRESCR0);
-}
diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c
index f38453af82c..17940aa9146 100644
--- a/board/renesas/rcar-common/common.c
+++ b/board/renesas/rcar-common/common.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <hang.h>
 #include <init.h>
 #include <asm/global_data.h>
+#include <asm/io.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch/rmobile.h>
 #include <linux/libfdt.h>
@@ -47,6 +49,41 @@ int dram_init_banksize(void)
 	return 0;
 }
 
+#if defined(CONFIG_RCAR_GEN3)
+#define RST_BASE	0xE6160000
+#define RST_CA57RESCNT	(RST_BASE + 0x40)
+#define RST_CA53RESCNT	(RST_BASE + 0x44)
+#define RST_RSTOUTCR	(RST_BASE + 0x58)
+#define RST_CA57_CODE	0xA5A5000F
+#define RST_CA53_CODE	0x5A5A000F
+
+void __weak reset_cpu(void)
+{
+	unsigned long midr, cputype;
+
+	asm volatile("mrs %0, midr_el1" : "=r" (midr));
+	cputype = (midr >> 4) & 0xfff;
+
+	if (cputype == 0xd03)
+		writel(RST_CA53_CODE, RST_CA53RESCNT);
+	else if (cputype == 0xd07)
+		writel(RST_CA57_CODE, RST_CA57RESCNT);
+	else
+		hang();
+}
+#elif defined(CONFIG_RCAR_GEN4)
+#define RST_BASE	0xE6160000 /* Domain0 */
+#define RST_SRESCR0	(RST_BASE + 0x18)
+#define RST_SPRES	0x5AA58000
+
+void __weak reset_cpu(void)
+{
+	writel(RST_SPRES, RST_SRESCR0);
+}
+#else
+#error Neither CONFIG_RCAR_GEN3 nor CONFIG_RCAR_GEN4 are set
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node)
 {
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index c27eb3f17d9..939b48ee300 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -67,21 +67,12 @@ int board_init(void)
 	return 0;
 }
 
-#define RST_BASE	0xE6160000
-#define RST_CA57RESCNT	(RST_BASE + 0x40)
-#define RST_CA53RESCNT	(RST_BASE + 0x44)
-#define RST_RSTOUTCR	(RST_BASE + 0x58)
-#define RST_CODE	0xA5A5000F
-
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
 void reset_cpu(void)
 {
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
 	i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
-#else
-	/* only CA57 ? */
-	writel(RST_CODE, RST_CA57RESCNT);
-#endif
 }
+#endif
 
 #ifdef CONFIG_MULTI_DTB_FIT
 int board_fit_config_name_match(const char *name)
diff --git a/board/renesas/spider/spider.c b/board/renesas/spider/spider.c
index caf88dcc323..fd83a72229e 100644
--- a/board/renesas/spider/spider.c
+++ b/board/renesas/spider/spider.c
@@ -65,8 +65,3 @@ int board_init(void)
 
 	return 0;
 }
-
-void reset_cpu(void)
-{
-	writel(RST_SPRES, RST_SRESCR0);
-}
diff --git a/board/renesas/whitehawk/whitehawk.c b/board/renesas/whitehawk/whitehawk.c
index 19f09e009b5..32284b2ecc0 100644
--- a/board/renesas/whitehawk/whitehawk.c
+++ b/board/renesas/whitehawk/whitehawk.c
@@ -65,8 +65,3 @@ int board_init(void)
 
 	return 0;
 }
-
-void reset_cpu(void)
-{
-	writel(RST_SPRES, RST_SRESCR0);
-}
-- 
2.39.2



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