[PATCH v4 3/8] clk: k210: Move soc_clk_dump function

Sean Anderson seanga2 at gmail.com
Wed Nov 1 18:12:11 CET 2023


On 10/17/23 12:56, Igor Prusov wrote:
> Move clock dump function to avoid forward declaration after switching to
> dump in clk_ops.
> 
> Signed-off-by: Igor Prusov <ivprusov at sberdevices.ru>
> ---
>   drivers/clk/clk_k210.c | 92 +++++++++++++++++++++---------------------
>   1 file changed, 46 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
> index c534cc07e0..2f17152021 100644
> --- a/drivers/clk/clk_k210.c
> +++ b/drivers/clk/clk_k210.c
> @@ -1238,52 +1238,6 @@ static int k210_clk_request(struct clk *clk)
>   	return 0;
>   }
>   
> -static const struct clk_ops k210_clk_ops = {
> -	.request = k210_clk_request,
> -	.set_rate = k210_clk_set_rate,
> -	.get_rate = k210_clk_get_rate,
> -	.set_parent = k210_clk_set_parent,
> -	.enable = k210_clk_enable,
> -	.disable = k210_clk_disable,
> -};
> -
> -static int k210_clk_probe(struct udevice *dev)
> -{
> -	int ret;
> -	struct k210_clk_priv *priv = dev_get_priv(dev);
> -
> -	priv->base = dev_read_addr_ptr(dev_get_parent(dev));
> -	if (!priv->base)
> -		return -EINVAL;
> -
> -	ret = clk_get_by_index(dev, 0, &priv->in0);
> -	if (ret)
> -		return ret;
> -
> -	/*
> -	 * Force setting defaults, even before relocation. This is so we can
> -	 * set the clock rate for PLL1 before we relocate into aisram.
> -	 */
> -	if (!(gd->flags & GD_FLG_RELOC))
> -		clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
> -
> -	return 0;
> -}
> -
> -static const struct udevice_id k210_clk_ids[] = {
> -	{ .compatible = "canaan,k210-clk" },
> -	{ },
> -};
> -
> -U_BOOT_DRIVER(k210_clk) = {
> -	.name = "k210_clk",
> -	.id = UCLASS_CLK,
> -	.of_match = k210_clk_ids,
> -	.ops = &k210_clk_ops,
> -	.probe = k210_clk_probe,
> -	.priv_auto = sizeof(struct k210_clk_priv),
> -};
> -
>   #if IS_ENABLED(CONFIG_CMD_CLK)
>   static char show_enabled(struct k210_clk_priv *priv, int id)
>   {
> @@ -1342,3 +1296,49 @@ int soc_clk_dump(void)
>   	return 0;
>   }
>   #endif
> +
> +static const struct clk_ops k210_clk_ops = {
> +	.request = k210_clk_request,
> +	.set_rate = k210_clk_set_rate,
> +	.get_rate = k210_clk_get_rate,
> +	.set_parent = k210_clk_set_parent,
> +	.enable = k210_clk_enable,
> +	.disable = k210_clk_disable,
> +};
> +
> +static int k210_clk_probe(struct udevice *dev)
> +{
> +	int ret;
> +	struct k210_clk_priv *priv = dev_get_priv(dev);
> +
> +	priv->base = dev_read_addr_ptr(dev_get_parent(dev));
> +	if (!priv->base)
> +		return -EINVAL;
> +
> +	ret = clk_get_by_index(dev, 0, &priv->in0);
> +	if (ret)
> +		return ret;
> +
> +	/*
> +	 * Force setting defaults, even before relocation. This is so we can
> +	 * set the clock rate for PLL1 before we relocate into aisram.
> +	 */
> +	if (!(gd->flags & GD_FLG_RELOC))
> +		clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
> +
> +	return 0;
> +}
> +
> +static const struct udevice_id k210_clk_ids[] = {
> +	{ .compatible = "canaan,k210-clk" },
> +	{ },
> +};
> +
> +U_BOOT_DRIVER(k210_clk) = {
> +	.name = "k210_clk",
> +	.id = UCLASS_CLK,
> +	.of_match = k210_clk_ids,
> +	.ops = &k210_clk_ops,
> +	.probe = k210_clk_probe,
> +	.priv_auto = sizeof(struct k210_clk_priv),
> +};

Reviewed-by: Sean Anderson <seanga2 at gmail.com>


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