[PATCH] mtd: rawnand: omap_gpmc: fix BCH8 HW based correction

[Heiko Schocher]

commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction")

broke AM335x based boards booting from NAND with ECC BCH8 code.

Use omap_enable_hwecc() instead of omap_enable_hwecc_bch()
in SPL restores correct SPL nand_read_page functionality.

Tested on draco thuban board.

Signed-off-by: Heiko Schocher <hs at denx.de>

---
fix NAND boot for BCH8 based TI AM335x boards

Fix is based on series from Enrico:

https://lists.denx.de/pipermail/u-boot/2023-November/536793.html

and fixes NAND boot for the draco thuban board. But this patch
apply also without the patches from above patchseries, see
azure build:

https://dev.azure.com/hs0298/hs/_build/results?buildId=111&view=results

which is clean.

Above commit seems to change only U-Boot code and did not
adapt am335x_spl_bch.c, which breaks nand_read_page in SPL
code for AM335x based boards. So use in SPL "old" hw setup
and reading page from NAND in SPL works again.


 drivers/mtd/nand/raw/omap_gpmc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 1a5ed0de31..c9b66dadbd 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -983,7 +983,11 @@ static int omap_select_ecc_scheme(struct nand_chip *nand,
 		nand->ecc.strength	= 8;
 		nand->ecc.size		= SECTOR_BYTES;
 		nand->ecc.bytes		= 14;
+#if defined(CONFIG_SPL_BUILD)
+		nand->ecc.hwctl		= omap_enable_hwecc;
+#else
 		nand->ecc.hwctl		= omap_enable_hwecc_bch;
+#endif
 		nand->ecc.correct	= omap_correct_data_bch;
 		nand->ecc.calculate	= omap_calculate_ecc_bch;
 		nand->ecc.read_page	= omap_read_page_bch;
-- 
2.37.3