[PATCH v4 0/6] spi-nor: Add parallel and stacked memories support

[Michal Simek]

út 14. 11. 2023 v 5:57 odesílatel Venkatesh Yadav Abbarapu
<venkatesh.abbarapu at amd.com> napsal:
>
> This series adds support for Xilinx qspi parallel and stacked memeories.
>
> In parallel mode, the current implementation assumes that a maximum of
> two flashes are connected. The QSPI controller splits the data evenly
> between both the flashes so, both the flashes that are connected in
> parallel mode should be identical.
> During each operation SPI-NOR sets 0th bit for CS0 & 1st bit for CS1 in
> nor->flags.
>
> In stacked mode the current implementation assumes that a maximum of two
> flashes are connected and both the flashes are of same make but can differ
> in sizes. So, except the sizes all other flash parameters of both the flashes
> are identical.
>
> Spi-nor will pass on the appropriate flash select flag to low level driver,
> and it will select pass all the data to that particular flash.
>
> Write operation in parallel mode are performed in page size * 2 chunks as each
> write operation results in writing both the flashes. For doubling the address
> space each operation is performed at addr/2 flash offset, where addr is the
> address specified by the user.
>
> Similarly for read and erase operations it will read from both flashes, so size
> and offset are divided by 2 and send to flash.
>
>
> Changes in v2:
> - Fixed the compilation issues.
> Changes in v3:
> - Fixed the CI issues.
> Changes in v4:
> - Removed the dio,dummy_bytes variables from zynq_qspi driver.
> - Fix the compilation issue by including the DM_SERIAL config.
>
> Ashok Reddy Soma (4):
>   mtd: spi-nor: Add parallel and stacked memories support
>   mtd: spi-nor: Add parallel memories support for read_sr and read_fsr
>   mtd: spi-nor: Add parallel and stacked memories support in read_bar
>     and write_bar
>   spi: spi-uclass: Read chipselect and restrict capabilities
>
> Venkatesh Yadav Abbarapu (2):
>   spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver
>   spi: zynq_qspi: Add parallel memories support in QSPI driver
>
>  drivers/mtd/spi/sandbox.c      |   2 +-
>  drivers/mtd/spi/spi-nor-core.c | 389 ++++++++++++++++++++++++++++-----
>  drivers/spi/altera_spi.c       |   4 +-
>  drivers/spi/atcspi200_spi.c    |   2 +-
>  drivers/spi/ath79_spi.c        |   2 +-
>  drivers/spi/atmel_spi.c        |   6 +-
>  drivers/spi/bcm63xx_hsspi.c    |  42 ++--
>  drivers/spi/bcm63xx_spi.c      |   6 +-
>  drivers/spi/bcmbca_hsspi.c     |  34 +--
>  drivers/spi/cf_spi.c           |   6 +-
>  drivers/spi/davinci_spi.c      |   6 +-
>  drivers/spi/fsl_dspi.c         |  18 +-
>  drivers/spi/fsl_espi.c         |   4 +-
>  drivers/spi/fsl_qspi.c         |   4 +-
>  drivers/spi/gxp_spi.c          |   2 +-
>  drivers/spi/mpc8xx_spi.c       |   4 +-
>  drivers/spi/mpc8xxx_spi.c      |  10 +-
>  drivers/spi/mscc_bb_spi.c      |   4 +-
>  drivers/spi/mxc_spi.c          |   6 +-
>  drivers/spi/npcm_fiu_spi.c     |  14 +-
>  drivers/spi/nxp_fspi.c         |   2 +-
>  drivers/spi/octeon_spi.c       |   2 +-
>  drivers/spi/omap3_spi.c        |   4 +-
>  drivers/spi/pic32_spi.c        |   2 +-
>  drivers/spi/rk_spi.c           |   4 +-
>  drivers/spi/rockchip_sfc.c     |   2 +-
>  drivers/spi/spi-aspeed-smc.c   |  28 +--
>  drivers/spi/spi-mxic.c         |   6 +-
>  drivers/spi/spi-qup.c          |   4 +-
>  drivers/spi/spi-sifive.c       |   6 +-
>  drivers/spi/spi-sn-f-ospi.c    |   2 +-
>  drivers/spi/spi-sunxi.c        |   6 +-
>  drivers/spi/spi-synquacer.c    |   4 +-
>  drivers/spi/spi-uclass.c       |  23 +-
>  drivers/spi/stm32_qspi.c       |   2 +-
>  drivers/spi/stm32_spi.c        |   4 +-
>  drivers/spi/ti_qspi.c          |  14 +-
>  drivers/spi/xilinx_spi.c       |   4 +-
>  drivers/spi/zynq_qspi.c        | 120 ++++++++--
>  drivers/spi/zynq_spi.c         |   6 +-
>  drivers/spi/zynqmp_gqspi.c     | 140 ++++++++++--
>  include/linux/mtd/spi-nor.h    |  13 ++
>  include/spi.h                  |  26 ++-
>  lib/acpi/acpi_device.c         |   2 +-
>  44 files changed, 765 insertions(+), 226 deletions(-)
>
> --
> 2.17.1
>

There are some issues related to sandbox reported in CI that's why v5
is required.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs